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[V6,5/5] target-i386: add q35 0xcf8 port as coalesced_pio

Message ID 1539795177-21038-6-git-send-email-peng.hao2@zte.com.cn (mailing list archive)
State New, archived
Headers show
Series target/i386: introduce coalesced pio | expand

Commit Message

Peng Hao Oct. 17, 2018, 4:52 p.m. UTC
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
---
 hw/pci-host/q35.c | 4 ++++
 1 file changed, 4 insertions(+)
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Patch

diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 02f9576..8ce1e09 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -51,6 +51,10 @@  static void q35_host_realize(DeviceState *dev, Error **errp)
     sysbus_add_io(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, &pci->data_mem);
     sysbus_init_ioports(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, 4);
 
+    /* register q35 0xcf8 port as coalesced pio */
+    memory_region_set_flush_coalesced(&pci->data_mem);
+    memory_region_add_coalescing(&pci->conf_mem, 0, 4);
+
     pci->bus = pci_root_bus_new(DEVICE(s), "pcie.0",
                                 s->mch.pci_address_space,
                                 s->mch.address_space_io,