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Fri, 16 Nov 2018 10:27:47 +0800 (GMT-8) (envelope-from peng.hao2@zte.com.cn) Received: from localhost.localdomain.localdomain ([10.74.120.59]) by szsmtp06.zte.com.cn (Lotus Domino Release 8.5.3FP6) with ESMTP id 2018111610282292-11036267 ; Fri, 16 Nov 2018 10:28:22 +0800 From: Peng Hao To: peter.maydell@linaro.org, drjones@redhat.com, philmd@redhat.com Date: Fri, 16 Nov 2018 18:50:03 +0800 Message-Id: <1542365406-81310-4-git-send-email-peng.hao2@zte.com.cn> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1542365406-81310-1-git-send-email-peng.hao2@zte.com.cn> References: <1542365406-81310-1-git-send-email-peng.hao2@zte.com.cn> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on SZSMTP06/server/zte_ltd(Release 8.5.3FP6|November 21, 2013) at 2018-11-16 10:28:22, Serialize by Router on notes_smtp/zte_ltd(Release 9.0.1FP7|August 17, 2016) at 2018-11-16 10:27:31 X-MAIL: mse01.zte.com.cn wAG2RlZg028648 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 202.103.147.172 Subject: [Qemu-devel] [PATCH V7 3/6] hw/misc/pvpanic: Add the MMIO interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peng Hao , qemu-arm@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add pvpanic new type "TYPE_PVPANIC_MMIO" Signed-off-by: Peng Hao Signed-off-by: Philippe Mathieu-Daudé --- hw/misc/pvpanic.c | 81 +++++++++++++++++++++++++++++++++++++---------- include/hw/misc/pvpanic.h | 1 + 2 files changed, 65 insertions(+), 17 deletions(-) diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c index dd3aef2..5d0fbc6 100644 --- a/hw/misc/pvpanic.c +++ b/hw/misc/pvpanic.c @@ -2,10 +2,12 @@ * QEMU simulated pvpanic device. * * Copyright Fujitsu, Corp. 2013 + * Copyright (c) 2018 ZTE Ltd. * * Authors: * Wen Congyang * Hu Tao + * Peng Hao * * This work is licensed under the terms of the GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. @@ -25,9 +27,6 @@ /* The pv event value */ #define PVPANIC_PANICKED (1 << PVPANIC_F_PANICKED) -#define PVPANIC(obj) \ - OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC) - static void handle_event(int event) { static bool logged; @@ -45,30 +44,50 @@ static void handle_event(int event) #include "hw/isa/isa.h" -typedef struct PVPanicState { - /* private */ - ISADevice isadev; +/* PVPanicISAState for ISA device and + * use ioport. + */ +typedef struct PVPanicISAState { + /* private */ + ISADevice isadev; + uint16_t ioport; /* public */ MemoryRegion mr; - uint16_t ioport; -} PVPanicState; +} PVPanicISAState; + +/* PVPanicMMIOState for sysbus device and + * use mmio. + */ +typedef struct PVPanicMMIOState { + /* private */ + SysBusDevice busdev; + + /* public */ + MemoryRegion mr; +} PVPanicMMIOState; + +#define PVPANIC_ISA(obj) \ + OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC) + +#define PVPANIC_MMIO(obj) \ + OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO) /* return supported events on read */ -static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size) +static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size) { return PVPANIC_PANICKED; } -static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val, +static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { handle_event(val); } static const MemoryRegionOps pvpanic_ops = { - .read = pvpanic_ioport_read, - .write = pvpanic_ioport_write, + .read = pvpanic_read, + .write = pvpanic_write, .impl = { .min_access_size = 1, .max_access_size = 1, @@ -77,15 +96,16 @@ static const MemoryRegionOps pvpanic_ops = { static void pvpanic_isa_initfn(Object *obj) { - PVPanicState *s = PVPANIC(obj); + PVPanicISAState *s = PVPANIC_ISA(obj); - memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1); + memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s, + TYPE_PVPANIC, 1); } static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp) { ISADevice *d = ISA_DEVICE(dev); - PVPanicState *s = PVPANIC(dev); + PVPanicISAState *s = PVPANIC_ISA(dev); FWCfgState *fw_cfg = fw_cfg_find(); uint16_t *pvpanic_port; @@ -102,7 +122,7 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp) } static Property pvpanic_isa_properties[] = { - DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505), + DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505), DEFINE_PROP_END_OF_LIST(), }; @@ -118,14 +138,41 @@ static void pvpanic_isa_class_init(ObjectClass *klass, void *data) static TypeInfo pvpanic_isa_info = { .name = TYPE_PVPANIC, .parent = TYPE_ISA_DEVICE, - .instance_size = sizeof(PVPanicState), + .instance_size = sizeof(PVPanicISAState), .instance_init = pvpanic_isa_initfn, .class_init = pvpanic_isa_class_init, }; + +static void pvpanic_mmio_initfn(Object *obj) +{ + PVPanicMMIOState *s = PVPANIC_MMIO(obj); + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + + memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s, + TYPE_PVPANIC_MMIO, 2); + sysbus_init_mmio(sbd, &s->mr); +} + +static void pvpanic_mmio_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + set_bit(DEVICE_CATEGORY_MISC, dc->categories); +} + +static TypeInfo pvpanic_mmio_info = { + .name = TYPE_PVPANIC_MMIO, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(PVPanicMMIOState), + .instance_init = pvpanic_mmio_initfn, + .class_init = pvpanic_mmio_class_init, +}; + static void pvpanic_register_types(void) { type_register_static(&pvpanic_isa_info); + type_register_static(&pvpanic_mmio_info); } type_init(pvpanic_register_types) diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h index 1ee071a..19c0fbb 100644 --- a/include/hw/misc/pvpanic.h +++ b/include/hw/misc/pvpanic.h @@ -17,6 +17,7 @@ #define TYPE_PVPANIC "pvpanic" #define PVPANIC_IOPORT_PROP "ioport" +#define TYPE_PVPANIC_MMIO "pvpanic-mmio" static inline uint16_t pvpanic_port(void) {