Message ID | 1582537164-764-4-git-send-email-sai.pavan.boddu@xilinx.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Mon, 24 Feb 2020 01:44:12 -0800 Received: from xsj-pvapsmtp01 (mailhost.xilinx.com [149.199.38.66]) by xsj-smtp-dlp2.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id 01O9iCpG025463; Mon, 24 Feb 2020 01:44:12 -0800 Received: from [10.140.6.35] (helo=xhdsaipava40.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from <saipava@xhdsaipava40.xilinx.com>) id 1j6AHb-0008Pd-Pf; Mon, 24 Feb 2020 01:44:12 -0800 Received: by xhdsaipava40.xilinx.com (Postfix, from userid 14131) id 5F79E13C0374; Mon, 24 Feb 2020 15:09:39 +0530 (IST) From: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> To: "Edgar E . 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Series |
Fix number of priority bits for arm boards
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expand
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diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c index 2e3e87c..ab9fadb 100644 --- a/hw/cpu/arm11mpcore.c +++ b/hw/cpu/arm11mpcore.c @@ -15,6 +15,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" +#define ARM11MPCORE_NUM_GIC_PRIORITY_BITS 4 static void mpcore_priv_set_irq(void *opaque, int irq, int level) { @@ -86,6 +87,10 @@ static void mpcore_priv_realize(DeviceState *dev, Error **errp) qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu); qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq); + qdev_prop_set_uint32(gicdev, "num-priority-bits", + ARM11MPCORE_NUM_GIC_PRIORITY_BITS); + + object_property_set_bool(OBJECT(&s->gic), true, "realized", &err); if (err != NULL) { error_propagate(errp, err);