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Fri, 8 May 2020 16:30:57 +0530 (IST) From: Sai Pavan Boddu To: "Edgar E. Iglesias" , Alistair Francis , Peter Maydell , Jason Wang , Markus Armbruster , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Tong Ho , Ramon Fried Subject: [PATCH v3 05/11] net: cadence_gem: Set ISR according to queue in use Date: Fri, 8 May 2020 16:30:39 +0530 Message-Id: <1588935645-20351-6-git-send-email-sai.pavan.boddu@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1588935645-20351-1-git-send-email-sai.pavan.boddu@xilinx.com> References: <1588935645-20351-1-git-send-email-sai.pavan.boddu@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFTY:; SFS:(39860400002)(396003)(136003)(376002)(346002)(46966005)(33430700001)(81166007)(33440700001)(356005)(6666004)(2906002)(70206006)(42186006)(316002)(26005)(82310400002)(70586007)(336012)(110136005)(47076004)(82740400003)(5660300002)(2616005)(6266002)(36756003)(426003)(186003)(4326008)(8936002)(8676002)(478600001); DIR:OUT; SFP:1101; MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d3fad829-dbfe-4d17-86a5-08d7f340303b X-MS-TrafficTypeDiagnostic: MN2PR02MB5789: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:260; X-Forefront-PRVS: 039735BC4E X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 8CZ5FghUr0Z5qGxOnYHeWcayCPXDipba6dlNy138O8PCNgb6G5BcRDTuQKPGY9OgwMOLqSWwararCWE97fWY5GUqnzaWW2cizLn+9pB5kHvxrdQlXoqbgcRJjYcS9B50yQ5sOfAUXRl0JkbfGS5sgqYLf1JCJWxox5HOAyCb3VObDAQBwqWGCD26J/+XD0Af3Hm3agOftJl2StEL6lgHpqjv0vmXIW7/UI4Twon0vFMGRtpeoARsRKIwDAZj/macO2r0du71dV+ikrlNo0xwmaPNFrfotESKczY8LjFqL2uZt7Ci6Jw397+WtFTVqXlwbEV8uyQSnPV0Aa9NvJVD5U/ic+m52NuLU7ZEQ1/CDfooEc0mvlE8nbrSKCWB6E6UclzZwM6lP1fzCGS9VyvRJw+vuSykWOmCQxFNJbM0r7+GJsdD7tYjtw80s9zrzOGkJWO5YjBMbtzNfoPqwq85TnKkOikcpeu+jHdMyrjsy/8BDXxetYDUWIvmHrpKqLHwkQfqpdbxh+pWuIMQSI8mgebxBcie/cAuTYd1J8Di7qJCFCDiPGXSMHtrRpjXaqn4KluTpkSWRPTlw7VS3yeTcw== X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 May 2020 11:08:50.8748 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d3fad829-dbfe-4d17-86a5-08d7f340303b X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR02MB5789 Received-SPF: pass client-ip=40.107.92.89; envelope-from=saipava@xilinx.com; helo=NAM10-BN7-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/08 07:08:53 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Set ISR according to queue in use, added interrupt support for all queues. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 74ef447..77a0588 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -451,6 +451,16 @@ static inline void rx_desc_set_sar(uint32_t *desc, int sar_idx) /* The broadcast MAC address: 0xFFFFFFFFFFFF */ static const uint8_t broadcast_addr[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; +static void gem_set_isr(CadenceGEMState *s, int q, uint32_t flag) +{ + if (q == 0) { + s->regs[GEM_ISR] |= flag & ~(s->regs[GEM_IMR]); + } else { + s->regs[GEM_INT_Q1_STATUS + q - 1] |= flag & + ~(s->regs[GEM_INT_Q1_MASK + q - 1]); + } +} + /* * gem_init_register_masks: * One time initialization. @@ -906,7 +916,7 @@ static void gem_get_rx_desc(CadenceGEMState *s, int q) if (rx_desc_get_ownership(s->rx_desc[q]) == 1) { DB_PRINT("descriptor 0x%" HWADDR_PRIx " owned by sw.\n", desc_addr); s->regs[GEM_RXSTATUS] |= GEM_RXSTATUS_NOBUF; - s->regs[GEM_ISR] |= GEM_INT_RXUSED & ~(s->regs[GEM_IMR]); + gem_set_isr(s, q, GEM_INT_RXUSED); /* Handle interrupt consequences */ gem_update_int_status(s); } @@ -1080,7 +1090,7 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size) gem_receive_updatestats(s, buf, size); s->regs[GEM_RXSTATUS] |= GEM_RXSTATUS_FRMRCVD; - s->regs[GEM_ISR] |= GEM_INT_RXCMPL & ~(s->regs[GEM_IMR]); + gem_set_isr(s, q, GEM_INT_RXCMPL); /* Handle interrupt consequences */ gem_update_int_status(s); @@ -1231,13 +1241,7 @@ static void gem_transmit(CadenceGEMState *s) DB_PRINT("TX descriptor next: 0x%08x\n", s->tx_desc_addr[q]); s->regs[GEM_TXSTATUS] |= GEM_TXSTATUS_TXCMPL; - s->regs[GEM_ISR] |= GEM_INT_TXCMPL & ~(s->regs[GEM_IMR]); - - /* Update queue interrupt status */ - if (s->num_priority_queues > 1) { - s->regs[GEM_INT_Q1_STATUS + q] |= - GEM_INT_TXCMPL & ~(s->regs[GEM_INT_Q1_MASK + q]); - } + gem_set_isr(s, q, GEM_INT_TXCMPL); /* Handle interrupt consequences */ gem_update_int_status(s); @@ -1287,7 +1291,10 @@ static void gem_transmit(CadenceGEMState *s) if (tx_desc_get_used(desc)) { s->regs[GEM_TXSTATUS] |= GEM_TXSTATUS_USED; - s->regs[GEM_ISR] |= GEM_INT_TXUSED & ~(s->regs[GEM_IMR]); + /* IRQ TXUSED is defined only for queue 0 */ + if (q == 0) { + gem_set_isr(s, 0, GEM_INT_TXUSED); + } gem_update_int_status(s); } }