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[PULL,02/18] target/mips: Add comments for vendor-specific ASEs

Message ID 1592249340-8365-3-git-send-email-aleksandar.qemu.devel@gmail.com (mailing list archive)
State New, archived
Headers show
Series [PULL,01/18] target/mips: Legalize Loongson insn flags | expand

Commit Message

Aleksandar Markovic June 15, 2020, 7:28 p.m. UTC 
From: Jiaxun Yang <jiaxun.yang@flygoat.com>

Abbreviations of vendor-specific ASEs looks very similiar.
Add comments to explain the full name and vendors of these flags.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-Id: <20200614080049.31134-3-jiaxun.yang@flygoat.com>
---
 target/mips/mips-defs.h | 4 ++++
 1 file changed, 4 insertions(+)
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Patch

diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index f1b833f..ed6a7a9 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -57,9 +57,13 @@ 
 /*
  *   bits 52-63: vendor-specific ASEs
  */
+/* MultiMedia Instructions defined by R5900 */
 #define ASE_MMI           0x0010000000000000ULL
+/* MIPS eXtension/enhanced Unit defined by Ingenic */
 #define ASE_MXU           0x0020000000000000ULL
+/* Loongson MultiMedia Instructions */
 #define ASE_LMMI          0x0040000000000000ULL
+/* Loongson EXTensions */
 #define ASE_LEXT          0x0080000000000000ULL
 
 /* MIPS CPU defines. */