From patchwork Tue Nov 9 12:51:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaojuan Yang X-Patchwork-Id: 12610659 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78995C4332F for ; Tue, 9 Nov 2021 12:56:33 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 40F7A6109F for ; Tue, 9 Nov 2021 12:56:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 40F7A6109F Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:59414 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mkQfw-0000RZ-Em for qemu-devel@archiver.kernel.org; Tue, 09 Nov 2021 07:56:32 -0500 Received: from eggs.gnu.org ([209.51.188.92]:47094) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mkQcA-0000KH-S4 for qemu-devel@nongnu.org; Tue, 09 Nov 2021 07:52:38 -0500 Received: from mail.loongson.cn ([114.242.206.163]:37862 helo=loongson.cn) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mkQc8-0006L2-O2 for qemu-devel@nongnu.org; Tue, 09 Nov 2021 07:52:38 -0500 Received: from kvm-dev1.localdomain (unknown [10.2.5.134]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9Cx+dD5bophXJYBAA--.3628S14; Tue, 09 Nov 2021 20:52:23 +0800 (CST) From: Xiaojuan Yang To: qemu-devel@nongnu.org Subject: [PATCH v2 12/30] target/loongarch: Add timer related instructions support. Date: Tue, 9 Nov 2021 20:51:51 +0800 Message-Id: <1636462329-1716-13-git-send-email-yangxiaojuan@loongson.cn> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1636462329-1716-1-git-send-email-yangxiaojuan@loongson.cn> References: <1636462329-1716-1-git-send-email-yangxiaojuan@loongson.cn> X-CM-TRANSID: AQAAf9Cx+dD5bophXJYBAA--.3628S14 X-Coremail-Antispam: 1UD129KBjvJXoWxGry8JFyktryDGw1DWFykKrg_yoW5ur43pF 4IkrW5KF48trZxXay8J3WYgr98Za1xKrW2qa9av3s5CF43XwsrZr10g3sIgFy5Ja1UWryj vF1vyw1UuF17X3JanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UUUUUUUUU== X-CM-SenderInfo: p1dqw5xldry3tdq6z05rqj20fqof0/ Received-SPF: pass client-ip=114.242.206.163; envelope-from=yangxiaojuan@loongson.cn; helo=loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, thuth@redhat.com, philmd@redhat.com, i.qemu@xen0n.name, richard.henderson@linaro.org, laurent@vivier.eu, peterx@redhat.com, f4bug@amsat.org, yangxiaojuan@loongson.cn, alistair.francis@wdc.com, maobibo@loongson.cn, gaosong@loongson.cn, pbonzini@redhat.com, mark.cave-ayland@ilande.co.uk, chenhuacai@loongson.cn, alex.bennee@linaro.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This includes: -RDTIME{L/H}.W -RDTIME.D Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- target/loongarch/helper.h | 1 + target/loongarch/insn_trans/trans_extra.c.inc | 32 +++++++++++++++++++ target/loongarch/op_helper.c | 4 +++ target/loongarch/translate.c | 2 ++ 4 files changed, 39 insertions(+) diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h index afb362c9c7..fc4eaa1ce8 100644 --- a/target/loongarch/helper.h +++ b/target/loongarch/helper.h @@ -114,4 +114,5 @@ DEF_HELPER_4(lddir, tl, env, tl, tl, i32) DEF_HELPER_4(ldpte, void, env, tl, tl, i32) DEF_HELPER_1(ertn, void, env) DEF_HELPER_1(idle, void, env) +DEF_HELPER_1(rdtime_d, i64, env) #endif /* !CONFIG_USER_ONLY */ diff --git a/target/loongarch/insn_trans/trans_extra.c.inc b/target/loongarch/insn_trans/trans_extra.c.inc index 76f0698da7..ab46331547 100644 --- a/target/loongarch/insn_trans/trans_extra.c.inc +++ b/target/loongarch/insn_trans/trans_extra.c.inc @@ -33,22 +33,54 @@ static bool trans_asrtgt_d(DisasContext *ctx, arg_asrtgt_d * a) return true; } +#ifndef CONFIG_USER_ONLY +static bool gen_rdtime(DisasContext *ctx, arg_rdtimel_w *a, + bool word, bool high) +{ + TCGv dst1 = gpr_dst(ctx, a->rd, EXT_NONE); + TCGv dst2 = gpr_dst(ctx, a->rj, EXT_NONE); + + if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { + gen_io_start(); + } + gen_helper_rdtime_d(dst1, cpu_env); + if (word) { + tcg_gen_sextract_tl(dst1, dst1, high ? 32 : 0, 32); + } + tcg_gen_ld_i64(dst2, cpu_env, offsetof(CPULoongArchState, CSR_TMID)); + + return true; +} +#endif + static bool trans_rdtimel_w(DisasContext *ctx, arg_rdtimel_w *a) { +#ifdef CONFIG_USER_ONLY tcg_gen_movi_tl(cpu_gpr[a->rd], 0); return true; +#else + return gen_rdtime(ctx, a, 1, 0); +#endif } static bool trans_rdtimeh_w(DisasContext *ctx, arg_rdtimeh_w *a) { +#ifdef CONFIG_USER_ONLY tcg_gen_movi_tl(cpu_gpr[a->rd], 0); return true; +#else + return gen_rdtime(ctx, a, 1, 1); +#endif } static bool trans_rdtime_d(DisasContext *ctx, arg_rdtime_d *a) { +#ifdef CONFIG_USER_ONLY tcg_gen_movi_tl(cpu_gpr[a->rd], 0); return true; +#else + return gen_rdtime(ctx, a, 0, 0); +#endif } static bool trans_cpucfg(DisasContext *ctx, arg_cpucfg *a) diff --git a/target/loongarch/op_helper.c b/target/loongarch/op_helper.c index e2a9fd9ad0..fb47914c87 100644 --- a/target/loongarch/op_helper.c +++ b/target/loongarch/op_helper.c @@ -134,5 +134,9 @@ void helper_idle(CPULoongArchState *env) do_raise_exception(env, EXCP_HLT, 0); } +uint64_t helper_rdtime_d(CPULoongArchState *env) +{ + return cpu_loongarch_get_stable_counter(env); +} #endif /* !CONFIG_USER_ONLY */ diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c index 3935b14163..15276a240f 100644 --- a/target/loongarch/translate.c +++ b/target/loongarch/translate.c @@ -25,6 +25,8 @@ static TCGv cpu_lladdr, cpu_llval; TCGv_i32 cpu_fcsr0; TCGv_i64 cpu_fpr[32]; +#include "exec/gen-icount.h" + #define DISAS_STOP DISAS_TARGET_0 #define DISAS_EXIT DISAS_TARGET_1