@@ -13,3 +13,7 @@ config LOONGSON_3A5000
select LOONGARCH_PCH_MSI
select LOONGARCH_EXTIOI
select LS7A_RTC
+ select FW_CFG_LOONGARCH
+
+config FW_CFG_LOONGARCH
+ bool
new file mode 100644
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * QEMU fw_cfg helpers (LoongArch specific)
+ *
+ * Copyright (C) 2021 Loongson Technology Corporation Limited
+ */
+
+#include "qemu/osdep.h"
+#include "hw/loongarch/fw_cfg.h"
+#include "hw/loongarch/loongarch.h"
+#include "hw/nvram/fw_cfg.h"
+#include "sysemu/sysemu.h"
+
+static void fw_cfg_boot_set(void *opaque, const char *boot_device,
+ Error **errp)
+{
+ fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
+}
+
+FWCfgState *loongarch_fw_cfg_init(ram_addr_t ram_size, MachineState *ms)
+{
+ FWCfgState *fw_cfg;
+ int max_cpus = ms->smp.max_cpus;
+ int smp_cpus = ms->smp.cpus;
+
+ fw_cfg = fw_cfg_init_mem_wide(FW_CFG_ADDR, FW_CFG_ADDR + 8, 8, 0, NULL);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
+ fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
+
+ qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
+ return fw_cfg;
+}
new file mode 100644
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * QEMU fw_cfg helpers (LoongArch specific)
+ *
+ * Copyright (C) 2021 Loongson Technology Corporation Limited
+ */
+
+#ifndef HW_LOONGARCH_FW_CFG_H
+#define HW_LOONGARCH_FW_CFG_H
+
+#include "hw/boards.h"
+#include "hw/nvram/fw_cfg.h"
+
+FWCfgState *loongarch_fw_cfg_init(ram_addr_t ram_size, MachineState *ms);
+#endif
@@ -13,6 +13,8 @@
#include "hw/char/serial.h"
#include "sysemu/sysemu.h"
#include "sysemu/qtest.h"
+#include "hw/loader.h"
+#include "elf.h"
#include "hw/irq.h"
#include "net/net.h"
#include "sysemu/runstate.h"
@@ -23,6 +25,9 @@
#include "hw/intc/loongarch_pch_msi.h"
#include "hw/pci-host/ls7a.h"
#include "hw/misc/unimp.h"
+#include "hw/loongarch/fw_cfg.h"
+
+#define LOONGSON3_BIOSNAME "loongarch_bios.bin"
CPULoongArchState *cpu_states[LOONGARCH_MAX_VCPUS];
@@ -195,8 +200,9 @@ static void ls3a5000_virt_init(MachineState *machine)
const char *cpu_model = machine->cpu_type;
LoongArchCPU *cpu;
CPULoongArchState *env;
- uint64_t lowram_size = 0, highram_size = 0;
+ uint64_t highram_size = 0;
MemoryRegion *lowmem = g_new(MemoryRegion, 1);
+ MemoryRegion *highmem = g_new(MemoryRegion, 1);
char *ramName = NULL;
ram_addr_t ram_size = machine->ram_size;
MemoryRegion *address_space_mem = get_system_memory();
@@ -204,6 +210,10 @@ static void ls3a5000_virt_init(MachineState *machine)
int i;
MemoryRegion *iomem = NULL;
PCIBus *pci_bus = NULL;
+ int bios_size;
+ char *filename;
+ MemoryRegion *bios = g_new(MemoryRegion, 1);
+ ram_addr_t offset = 0;
if (!cpu_model) {
cpu_model = LOONGARCH_CPU_TYPE_NAME("Loongson-3A5000");
@@ -246,21 +256,46 @@ static void ls3a5000_virt_init(MachineState *machine)
qemu_register_reset(main_cpu_reset, cpu);
}
+ if (ram_size < 1 * GiB) {
+ error_report("ram_size must be greater than 1G due to the bios memory layout");
+ exit(1);
+ }
+
ramName = g_strdup_printf("loongarch.lowram");
- lowram_size = MIN(ram_size, 256 * 0x100000);
memory_region_init_alias(lowmem, NULL, ramName, machine->ram,
- 0, lowram_size);
- memory_region_add_subregion(address_space_mem, 0, lowmem);
-
- highram_size = ram_size > lowram_size ? ram_size - 256 * 0x100000 : 0;
- if (highram_size > 0) {
- MemoryRegion *highmem = g_new(MemoryRegion, 1);
- ramName = g_strdup_printf("loongarch.highram");
- memory_region_init_alias(highmem, NULL, ramName, machine->ram,
- lowram_size, highram_size);
- memory_region_add_subregion(address_space_mem, 0x90000000, highmem);
+ 0, 256 * MiB);
+ memory_region_add_subregion(address_space_mem, offset, lowmem);
+ offset += 256 * MiB;
+
+ highram_size = ram_size - 256 * MiB;
+ ramName = g_strdup_printf("loongarch.highram");
+ memory_region_init_alias(highmem, NULL, ramName, machine->ram,
+ offset, highram_size);
+ memory_region_add_subregion(address_space_mem, 0x90000000, highmem);
+ offset += highram_size;
+
+ /* load the BIOS image. */
+ filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
+ machine->firmware ?: LOONGSON3_BIOSNAME);
+ if (filename) {
+ bios_size = load_image_targphys(filename, LA_BIOS_BASE, LA_BIOS_SIZE);
+ lams->fw_cfg = loongarch_fw_cfg_init(ram_size, machine);
+ rom_set_fw(lams->fw_cfg);
+ g_free(filename);
+ } else {
+ bios_size = -1;
}
+ if ((bios_size < 0 || bios_size > LA_BIOS_SIZE) && !qtest_enabled()) {
+ error_report("Could not load LOONGARCH bios '%s'", machine->firmware);
+ exit(1);
+ }
+
+ memory_region_init_ram(bios, NULL, "loongarch.bios",
+ LA_BIOS_SIZE, &error_fatal);
+ memory_region_set_readonly(bios, true);
+ memory_region_add_subregion(get_system_memory(), LA_BIOS_BASE, bios);
+
/* Add PM mmio memory for reboot and shutdown*/
iomem = g_new(MemoryRegion, 1);
memory_region_init_io(iomem, NULL, &loongarch_pm_ops, NULL,
@@ -311,6 +346,7 @@ static void loongarch_class_init(ObjectClass *oc, void *data)
mc->default_ram_id = "loongarch.ram";
mc->max_cpus = LOONGARCH_MAX_VCPUS;
mc->is_default = 1;
+ mc->default_machine_opts = "firmware=loongarch_bios.bin";
mc->default_kernel_irqchip_split = false;
mc->block_default_type = IF_VIRTIO;
mc->default_boot_order = "c";
@@ -1,5 +1,6 @@
loongarch_ss = ss.source_set()
loongarch_ss.add(files('loongarch_int.c'))
loongarch_ss.add(when: 'CONFIG_LOONGSON_3A5000', if_true: files('ls3a5000_virt.c', 'ipi.c'))
+loongarch_ss.add(when: 'CONFIG_FW_CFG_LOONGARCH', if_true: files('fw_cfg.c'))
hw_arch += {'loongarch': loongarch_ss}
@@ -33,6 +33,10 @@
#define VENDOR_REG 0x10
#define CPUNAME_REG 0x20
+#define FW_CFG_ADDR 0x1e020000
+#define LA_BIOS_BASE 0x1c000000
+#define LA_BIOS_SIZE (4 * 1024 * 1024)
+
typedef struct LoongArchMachineState {
/*< private >*/
MachineState parent_obj;
@@ -42,6 +46,7 @@ typedef struct LoongArchMachineState {
gipiState *gipi;
qemu_irq *pch_irq;
+ FWCfgState *fw_cfg;
} LoongArchMachineState;
#define TYPE_LOONGARCH_MACHINE MACHINE_TYPE_NAME("loongson7a")