@@ -881,7 +881,8 @@ void nvdimm_acpi_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev)
}
void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io,
- FWCfgState *fw_cfg, Object *owner)
+ FWCfgState *fw_cfg, Object *owner,
+ unsigned int cache_line_size)
{
memory_region_init_io(&state->io_mr, owner, &nvdimm_dsm_ops, state,
"nvdimm-acpi-io", NVDIMM_ACPI_IO_LEN);
@@ -893,6 +894,8 @@ void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io,
state->dsm_mem->len);
nvdimm_init_fit_buffer(&state->fit_buf);
+
+ state->cache_line_size = cache_line_size;
}
#define NVDIMM_COMMON_DSM "NCAL"
@@ -298,7 +298,7 @@ static void pc_init1(MachineState *machine,
if (pcms->acpi_nvdimm_state.is_enabled) {
nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io,
- pcms->fw_cfg, OBJECT(pcms));
+ pcms->fw_cfg, OBJECT(pcms), 64);
}
}
@@ -272,7 +272,7 @@ static void pc_q35_init(MachineState *machine)
if (pcms->acpi_nvdimm_state.is_enabled) {
nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io,
- pcms->fw_cfg, OBJECT(pcms));
+ pcms->fw_cfg, OBJECT(pcms), 64);
}
}
@@ -134,11 +134,14 @@ struct AcpiNVDIMMState {
/* the IO region used by OSPM to transfer control to QEMU. */
MemoryRegion io_mr;
+
+ unsigned int cache_line_size;
};
typedef struct AcpiNVDIMMState AcpiNVDIMMState;
void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io,
- FWCfgState *fw_cfg, Object *owner);
+ FWCfgState *fw_cfg, Object *owner,
+ unsigned int cache_line_size);
void nvdimm_build_acpi(GArray *table_offsets, GArray *table_data,
BIOSLinker *linker, AcpiNVDIMMState *state,
uint32_t ram_slots);
Software is allowed to write up to a cache line of data to the flush hint address (ACPI spec 6.1, Table 5-135). NVDIMM ACPI code needs this parameter to decide the address space size for flush hint addresses. Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com> --- hw/acpi/nvdimm.c | 5 ++++- hw/i386/pc_piix.c | 2 +- hw/i386/pc_q35.c | 2 +- include/hw/mem/nvdimm.h | 5 ++++- 4 files changed, 10 insertions(+), 4 deletions(-)