From patchwork Fri Mar 31 08:41:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haozhong Zhang X-Patchwork-Id: 9655665 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8F204602BD for ; Fri, 31 Mar 2017 08:45:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8502028616 for ; Fri, 31 Mar 2017 08:45:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 79EEB28630; Fri, 31 Mar 2017 08:45:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1141B28616 for ; Fri, 31 Mar 2017 08:45:58 +0000 (UTC) Received: from localhost ([::1]:39568 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ctsBx-0001p4-6Q for patchwork-qemu-devel@patchwork.kernel.org; Fri, 31 Mar 2017 04:45:57 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54910) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cts8d-0008QR-Ct for qemu-devel@nongnu.org; Fri, 31 Mar 2017 04:42:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cts8b-000265-VJ for qemu-devel@nongnu.org; Fri, 31 Mar 2017 04:42:31 -0400 Received: from mga03.intel.com ([134.134.136.65]:21496) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cts8b-00020h-N5 for qemu-devel@nongnu.org; Fri, 31 Mar 2017 04:42:29 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1490949749; x=1522485749; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=EN8mr9jEnqBRveGPeDkCjG0ZOvII5aODtxII8bVHI4k=; b=Xm2K7SGB/2QKmt6Laldo8RyAybHaaOKnpHaJL9w/z9mM60WAD0/BGv4A 9MSLX4cLoE7EROqhToI3WUYG6FxG/g==; Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 Mar 2017 01:42:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.36,251,1486454400"; d="scan'208"; a="1149181048" Received: from hz-desktop.sh.intel.com (HELO localhost) ([10.239.159.153]) by fmsmga002.fm.intel.com with ESMTP; 31 Mar 2017 01:42:27 -0700 From: Haozhong Zhang To: qemu-devel@nongnu.org Date: Fri, 31 Mar 2017 16:41:46 +0800 Message-Id: <20170331084147.32716-4-haozhong.zhang@intel.com> X-Mailer: git-send-email 2.10.1 In-Reply-To: <20170331084147.32716-1-haozhong.zhang@intel.com> References: <20170331084147.32716-1-haozhong.zhang@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.65 Subject: [Qemu-devel] [RFC PATCH 3/4] nvdimm acpi: record the cache line size in AcpiNVDIMMState X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haozhong Zhang , Xiao Guangrong , "Michael S. Tsirkin" , Eduardo Habkost , Paolo Bonzini , Igor Mammedov , dan.j.williams@intel.com, Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Software is allowed to write up to a cache line of data to the flush hint address (ACPI spec 6.1, Table 5-135). NVDIMM ACPI code needs this parameter to decide the address space size for flush hint addresses. Signed-off-by: Haozhong Zhang --- hw/acpi/nvdimm.c | 5 ++++- hw/i386/pc_piix.c | 2 +- hw/i386/pc_q35.c | 2 +- include/hw/mem/nvdimm.h | 5 ++++- 4 files changed, 10 insertions(+), 4 deletions(-) diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c index 8e7d6ec..ea2ac3e 100644 --- a/hw/acpi/nvdimm.c +++ b/hw/acpi/nvdimm.c @@ -881,7 +881,8 @@ void nvdimm_acpi_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev) } void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io, - FWCfgState *fw_cfg, Object *owner) + FWCfgState *fw_cfg, Object *owner, + unsigned int cache_line_size) { memory_region_init_io(&state->io_mr, owner, &nvdimm_dsm_ops, state, "nvdimm-acpi-io", NVDIMM_ACPI_IO_LEN); @@ -893,6 +894,8 @@ void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io, state->dsm_mem->len); nvdimm_init_fit_buffer(&state->fit_buf); + + state->cache_line_size = cache_line_size; } #define NVDIMM_COMMON_DSM "NCAL" diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 9f102aa..81dd379 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -298,7 +298,7 @@ static void pc_init1(MachineState *machine, if (pcms->acpi_nvdimm_state.is_enabled) { nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io, - pcms->fw_cfg, OBJECT(pcms)); + pcms->fw_cfg, OBJECT(pcms), 64); } } diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index dd792a8..19f5515 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -272,7 +272,7 @@ static void pc_q35_init(MachineState *machine) if (pcms->acpi_nvdimm_state.is_enabled) { nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io, - pcms->fw_cfg, OBJECT(pcms)); + pcms->fw_cfg, OBJECT(pcms), 64); } } diff --git a/include/hw/mem/nvdimm.h b/include/hw/mem/nvdimm.h index eb71f41..888def6 100644 --- a/include/hw/mem/nvdimm.h +++ b/include/hw/mem/nvdimm.h @@ -134,11 +134,14 @@ struct AcpiNVDIMMState { /* the IO region used by OSPM to transfer control to QEMU. */ MemoryRegion io_mr; + + unsigned int cache_line_size; }; typedef struct AcpiNVDIMMState AcpiNVDIMMState; void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io, - FWCfgState *fw_cfg, Object *owner); + FWCfgState *fw_cfg, Object *owner, + unsigned int cache_line_size); void nvdimm_build_acpi(GArray *table_offsets, GArray *table_data, BIOSLinker *linker, AcpiNVDIMMState *state, uint32_t ram_slots);