From patchwork Sun Jul 16 21:55:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 9843717 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4044B60212 for ; Sun, 16 Jul 2017 21:56:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2447E27F88 for ; Sun, 16 Jul 2017 21:56:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1793627F98; Sun, 16 Jul 2017 21:56:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6681727F88 for ; Sun, 16 Jul 2017 21:56:11 +0000 (UTC) Received: from localhost ([::1]:47034 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dWrWM-0002ZH-Vt for patchwork-qemu-devel@patchwork.kernel.org; Sun, 16 Jul 2017 17:56:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34718) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dWrVi-0002ZC-FY for qemu-devel@nongnu.org; Sun, 16 Jul 2017 17:55:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dWrVh-0006PC-FL for qemu-devel@nongnu.org; Sun, 16 Jul 2017 17:55:30 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:56892) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dWrVh-0006Jh-9e for qemu-devel@nongnu.org; Sun, 16 Jul 2017 17:55:29 -0400 Received: from [2001:bc8:30d7:120:9bb5:8936:7e6a:9e36] (helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1dWrVf-00053v-3g; Sun, 16 Jul 2017 23:55:27 +0200 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.89) (envelope-from ) id 1dWrVe-0003jE-0a; Sun, 16 Jul 2017 23:55:26 +0200 Date: Sun, 16 Jul 2017 23:55:25 +0200 From: Aurelien Jarno To: Richard Henderson Message-ID: <20170716215525.e57rklv3d5357mkj@aurel32.net> References: <20170707022111.21836-1-rth@twiddle.net> <20170707022111.21836-2-rth@twiddle.net> <20170715232256.agderyrnphikthfy@aurel32.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20170715232256.agderyrnphikthfy@aurel32.net> User-Agent: NeoMutt/20170113 (1.7.2) X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:bc8:30d7:100::1 Subject: Re: [Qemu-devel] [PATCH v2 01/27] target/sh4: Use cmpxchg for movco X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: bruno@clisp.org, qemu-devel@nongnu.org, glaubitz@debian.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP On 2017-07-16 01:22, Aurelien Jarno wrote: > On 2017-07-06 16:20, Richard Henderson wrote: > > As for other targets, cmpxchg isn't quite right for ll/sc, > > suffering from an ABA race, but is sufficient to implement > > portable atomic operations. > > > > Signed-off-by: Richard Henderson > > --- > > target/sh4/cpu.h | 3 ++- > > target/sh4/translate.c | 56 +++++++++++++++++++++++++++++++++----------------- > > 2 files changed, 39 insertions(+), 20 deletions(-) > > For the linux-user case, where we need to emulate sequences that needs > to be executed on multiple CPUs, while the ISA has been designed for > a single CPU, this patch looks good. There is no real other way to do > it. > > For the system case, one might imagine using MOVLI/MOVCO with a > different address, although 1) it hasn't been designed for that 2) all > the sequences I have found use the same address. I therefore wonder if > we should just add the code to correctly clear LDST in case of interrupt > or exception. I guess the patch for the system case is as simple as: Of course to integrate it with your patch it means adding the #ifdef #else #endif around the system and the user version. --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -86,6 +86,9 @@ void superh_cpu_do_interrupt(CPUState *cs) int do_irq = cs->interrupt_request & CPU_INTERRUPT_HARD; int do_exp, irq_vector = cs->exception_index; + /* LDST flag is cleared by an exception or an interrupt. */ + env->ldst = 0; + /* prioritize exceptions over interrupts */ do_exp = cs->exception_index != -1;