@@ -9,6 +9,7 @@ SIM = ../../../tricore-softmmu/qemu-system-tricore
SIMFLAGS = -M tricore_testboard -nographic -kernel
TESTCASES += test_abs.tst
+TESTCASES += test_bmerge.tst
all: build
@@ -8,7 +8,10 @@
#define TESTDEV_ADDR 0xf0000000
/* Register definitions */
#define DREG_RS1 %d0
+#define DREG_RS2 %d1
#define DREG_CALC_RESULT %d1
+#define DREG_CALC_PSW %d2
+#define DREG_CORRECT_PSW %d3
#define DREG_TEMP_LI %d10
#define DREG_TEMP %d11
#define DREG_TEST_NUM %d14
@@ -24,6 +27,17 @@ test_ ## num: \
mov DREG_TEST_NUM, num; \
jne testreg, DREG_CORRECT_RESULT, fail \
+#define TEST_CASE_PSW(num, testreg, correct, correct_psw, code...) \
+test_ ## num: \
+ code; \
+ LI(DREG_CORRECT_RESULT, correct) \
+ mov DREG_TEST_NUM, num; \
+ jne testreg, DREG_CORRECT_RESULT, fail; \
+ mfcr DREG_CALC_PSW, $psw; \
+ LI(DREG_CORRECT_PSW, correct_psw) \
+ mov DREG_TEST_NUM, num; \
+ jne DREG_CALC_PSW, DREG_CORRECT_PSW, fail;
+
/* Actual test case type
* e.g inst %dX, %dY -> TEST_D_D
* inst %dX, %dY, %dZ -> TEST_D_DD
@@ -35,6 +49,16 @@ test_ ## num: \
insn DREG_CALC_RESULT, DREG_RS1; \
)
+#define TEST_D_DD_PSW(insn, num, result, psw, rs1, rs2) \
+ TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
+ LI(DREG_RS1, rs1); \
+ LI(DREG_RS2, rs2); \
+ rstv; \
+ insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2; \
+ )
+
+
+
/* Pass/Fail handling part */
#define TEST_PASSFAIL \
j pass; \
new file mode 100644
@@ -0,0 +1,8 @@
+#include "macros.h"
+.text
+.global _start
+_start:
+ TEST_D_DD_PSW(bmerge, 1, 0x555557f7, 0x00000b80, 0x0000001d, 0x0000ffff)
+
+ TEST_PASSFAIL
+
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> --- tests/tcg/tricore/Makefile | 1 + tests/tcg/tricore/macros.h | 24 ++++++++++++++++++++++++ tests/tcg/tricore/test_bmerge.S | 8 ++++++++ 3 files changed, 33 insertions(+) create mode 100644 tests/tcg/tricore/test_bmerge.S