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[v3,09/38] target-microblaze: Conditionalize setting of PVR11_USE_MMU

Message ID 20180516185146.30708-10-edgar.iglesias@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Edgar E. Iglesias May 16, 2018, 6:51 p.m. UTC
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Conditionalize setting of PVR11_USE_MMU on the use_mmu
CPU property, otherwise we may incorrectly advertise an
MMU via PVR when the core in fact has none.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target/microblaze/cpu.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Richard Henderson May 17, 2018, 5:26 p.m. UTC | #1
On 05/16/2018 11:51 AM, Edgar E. Iglesias wrote:
> -    env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17);
> +    env->pvr.regs[11] = cpu->cfg.use_mmu ? PVR11_USE_MMU : 0 |
> +                        16 << 17;

I believe this needs parenthesis around the ?:.


r~
Edgar E. Iglesias May 17, 2018, 6 p.m. UTC | #2
On Thu, May 17, 2018 at 10:26:00AM -0700, Richard Henderson wrote:
> On 05/16/2018 11:51 AM, Edgar E. Iglesias wrote:
> > -    env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17);
> > +    env->pvr.regs[11] = cpu->cfg.use_mmu ? PVR11_USE_MMU : 0 |
> > +                        16 << 17;
> 
> I believe this needs parenthesis around the ?:.

Goot catch, I've fixed that for v4.

Cheers,
Edgar
diff mbox

Patch

diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 06476f6efc..6fdf0fd223 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -201,7 +201,8 @@  static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
                                         PVR5_DCACHE_WRITEBACK_MASK : 0;
 
     env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family.  */
-    env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17);
+    env->pvr.regs[11] = cpu->cfg.use_mmu ? PVR11_USE_MMU : 0 |
+                        16 << 17;
 
     mcc->parent_realize(dev, errp);
 }