From patchwork Tue Jun 19 16:32:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Venu Busireddy X-Patchwork-Id: 10475169 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6C1CC601D7 for ; Tue, 19 Jun 2018 17:35:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 59D0828A43 for ; Tue, 19 Jun 2018 17:35:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4BE4D28AA4; Tue, 19 Jun 2018 17:35:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AC5F828A43 for ; Tue, 19 Jun 2018 17:35:40 +0000 (UTC) Received: from localhost ([::1]:44082 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fVKXb-0006HQ-L1 for patchwork-qemu-devel@patchwork.kernel.org; Tue, 19 Jun 2018 13:35:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55500) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fVJZ0-0004PH-Ri for qemu-devel@nongnu.org; Tue, 19 Jun 2018 12:33:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fVJYv-0002as-Sw for qemu-devel@nongnu.org; Tue, 19 Jun 2018 12:33:02 -0400 Received: from userp2120.oracle.com ([156.151.31.85]:40316) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fVJYv-0002a6-KV for qemu-devel@nongnu.org; Tue, 19 Jun 2018 12:32:57 -0400 Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w5JGTB8M037041; Tue, 19 Jun 2018 16:32:56 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=corp-2017-10-26; bh=p9NWqwa894h5Yhvs15TwY+hZ487sQdcrv9kTRlBKk10=; b=j5dg+7/DqagiM6Dv+AorNy3bJJ/4fPU4JLL9mGdKoD5Y2orrUoDcVACU7eHTm9K0QMvy 4+PmJ5XCwmK4iWnbPl3KYfIaWOuqmV9opxfXyQD06iHUmJ3EHX/2BafWtqunBhHNup+l m6od40jmGs2E85+mpH8lVcyNI7GtcMlBtohf/uT5hIMwfiJRVgE9a9W8hm6LqoGusq5P n4auOnF9rBYO0dpBJ5YpFn3c9z151chsJoHzGV+/jr43P0xMPrGhjx1qvyw7nKUucF5V OMhW0sSx6/Z7ngb8rdoGKzdN4QZfHcRJjrdj/rAFYeKeykJbyP3ONrGbFf/uxyxLaKP4 Lg== Received: from userv0022.oracle.com (userv0022.oracle.com [156.151.31.74]) by userp2120.oracle.com with ESMTP id 2jmu6xrxny-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 Jun 2018 16:32:56 +0000 Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by userv0022.oracle.com (8.14.4/8.14.4) with ESMTP id w5JGWtDi032431 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 Jun 2018 16:32:55 GMT Received: from abhmp0012.oracle.com (abhmp0012.oracle.com [141.146.116.18]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w5JGWt0r009707; Tue, 19 Jun 2018 16:32:55 GMT Received: from localhost.localdomain (/10.159.242.141) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 19 Jun 2018 09:32:55 -0700 From: Venu Busireddy To: venu.busireddy@oracle.com, "Michael S . Tsirkin" , Marcel Apfelbaum Date: Tue, 19 Jun 2018 11:32:26 -0500 Message-Id: <20180619163228.13790-3-venu.busireddy@oracle.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180619163228.13790-1-venu.busireddy@oracle.com> References: <20180619163228.13790-1-venu.busireddy@oracle.com> X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8929 signatures=668702 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1805220000 definitions=main-1806190182 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 156.151.31.85 X-Mailman-Approved-At: Tue, 19 Jun 2018 13:31:57 -0400 Subject: [Qemu-devel] [PATCH 2/3] Add "Group Identifier" support to PCIe bridges. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: virtio-dev@lists.oasis-open.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add a "Vendor-Specific" capability to the PCIe bridge, to contain the "Group Identifier" (UUID) that will be used to pair a virtio device with the passthrough device attached to that bridge. This capability is added to the bridge iff the "uuid" option is specified for the bridge device, via the qemu command line. Also, the bridge's Device ID is changed to PCI_VENDOR_ID_REDHAT, and Vendor ID is changed to PCI_DEVICE_ID_REDHAT_PCIE_BRIDGE (from the default values), when the "uuid" option is present. Signed-off-by: Venu Busireddy --- hw/pci-bridge/ioh3420.c | 2 ++ hw/pci-bridge/pcie_root_port.c | 7 +++++++ hw/pci/pci_bridge.c | 32 ++++++++++++++++++++++++++++++++ include/hw/pci/pci.h | 2 ++ include/hw/pci/pcie.h | 1 + include/hw/pci/pcie_port.h | 1 + 6 files changed, 45 insertions(+) diff --git a/hw/pci-bridge/ioh3420.c b/hw/pci-bridge/ioh3420.c index a451d74ee6..b6b9ebc726 100644 --- a/hw/pci-bridge/ioh3420.c +++ b/hw/pci-bridge/ioh3420.c @@ -35,6 +35,7 @@ #define IOH_EP_MSI_SUPPORTED_FLAGS PCI_MSI_FLAGS_MASKBIT #define IOH_EP_MSI_NR_VECTOR 2 #define IOH_EP_EXP_OFFSET 0x90 +#define IOH_EP_VENDOR_OFFSET 0xCC #define IOH_EP_AER_OFFSET 0x100 /* @@ -111,6 +112,7 @@ static void ioh3420_class_init(ObjectClass *klass, void *data) rpc->exp_offset = IOH_EP_EXP_OFFSET; rpc->aer_offset = IOH_EP_AER_OFFSET; rpc->ssvid_offset = IOH_EP_SSVID_OFFSET; + rpc->vendor_offset = IOH_EP_VENDOR_OFFSET; rpc->ssid = IOH_EP_SSVID_SSID; } diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c index 45f9e8cd4a..ba470c7fda 100644 --- a/hw/pci-bridge/pcie_root_port.c +++ b/hw/pci-bridge/pcie_root_port.c @@ -71,6 +71,12 @@ static void rp_realize(PCIDevice *d, Error **errp) goto err_bridge; } + rc = pci_bridge_vendor_init(d, rpc->vendor_offset, errp); + if (rc < 0) { + error_append_hint(errp, "Can't init group ID, error %d\n", rc); + goto err_bridge; + } + if (rpc->interrupts_init) { rc = rpc->interrupts_init(d, errp); if (rc < 0) { @@ -137,6 +143,7 @@ static void rp_exit(PCIDevice *d) static Property rp_props[] = { DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present, QEMU_PCIE_SLTCAP_PCP_BITNR, true), + DEFINE_PROP_UUID(COMPAT_PROP_UUID, PCIDevice, uuid, false), DEFINE_PROP_END_OF_LIST() }; diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 40a39f57cb..c63bc439f7 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -34,12 +34,17 @@ #include "hw/pci/pci_bus.h" #include "qemu/range.h" #include "qapi/error.h" +#include "qemu/uuid.h" /* PCI bridge subsystem vendor ID helper functions */ #define PCI_SSVID_SIZEOF 8 #define PCI_SSVID_SVID 4 #define PCI_SSVID_SSID 6 +#define PCI_VENDOR_SIZEOF 20 +#define PCI_VENDOR_CAP_LEN_OFFSET 2 +#define PCI_VENDOR_GROUP_ID_OFFSET 4 + int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset, uint16_t svid, uint16_t ssid, Error **errp) @@ -57,6 +62,33 @@ int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset, return pos; } +int pci_bridge_vendor_init(PCIDevice *d, uint8_t offset, Error **errp) +{ + int pos; + PCIDeviceClass *dc = PCI_DEVICE_GET_CLASS(d); + + if (qemu_uuid_is_null(&d->uuid)) { + return 0; + } + + pos = pci_add_capability(d, PCI_CAP_ID_VNDR, offset, PCI_VENDOR_SIZEOF, + errp); + if (pos < 0) { + return pos; + } + + dc->vendor_id = PCI_VENDOR_ID_REDHAT; + dc->device_id = PCI_DEVICE_ID_REDHAT_PCIE_BRIDGE; + pci_set_word(d->config + PCI_VENDOR_ID, PCI_VENDOR_ID_REDHAT); + pci_set_word(d->config + PCI_DEVICE_ID, PCI_DEVICE_ID_REDHAT_PCIE_BRIDGE); + + pci_set_word(d->config + pos + PCI_VENDOR_CAP_LEN_OFFSET, + PCI_VENDOR_SIZEOF); + memcpy(d->config + offset + PCI_VENDOR_GROUP_ID_OFFSET, &d->uuid, + sizeof(QemuUUID)); + return pos; +} + /* Accessor function to get parent bridge device from pci bus. */ PCIDevice *pci_bridge_get_device(PCIBus *bus) { diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 990d6fcbde..ee234c5a6f 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -4,6 +4,7 @@ #include "hw/qdev.h" #include "exec/memory.h" #include "sysemu/dma.h" +#include "qemu/uuid.h" /* PCI includes legacy ISA access. */ #include "hw/isa/isa.h" @@ -343,6 +344,7 @@ struct PCIDevice { bool has_rom; MemoryRegion rom; uint32_t rom_bar; + QemuUUID uuid; /* INTx routing notifier */ PCIINTxRoutingNotifier intx_routing_notifier; diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index b71e369703..b4189d0ce3 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -82,6 +82,7 @@ struct PCIExpressDevice { }; #define COMPAT_PROP_PCP "power_controller_present" +#define COMPAT_PROP_UUID "uuid" /* PCI express capability helper functions */ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h index 0736014bfd..40db6dbbe7 100644 --- a/include/hw/pci/pcie_port.h +++ b/include/hw/pci/pcie_port.h @@ -74,6 +74,7 @@ typedef struct PCIERootPortClass { int exp_offset; int aer_offset; int ssvid_offset; + int vendor_offset; int ssid; } PCIERootPortClass;