From patchwork Fri Jun 29 22:19:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Venu Busireddy X-Patchwork-Id: 10497695 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 87A996022E for ; Fri, 29 Jun 2018 22:22:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 74F7E2936E for ; Fri, 29 Jun 2018 22:22:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6989B29397; Fri, 29 Jun 2018 22:22:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CB8AC2936E for ; Fri, 29 Jun 2018 22:22:33 +0000 (UTC) Received: from localhost ([::1]:44718 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fZ1mj-0004NI-0J for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 Jun 2018 18:22:33 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42627) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fZ1jw-0001VE-UU for qemu-devel@nongnu.org; Fri, 29 Jun 2018 18:19:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fZ1js-0007Vb-RT for qemu-devel@nongnu.org; Fri, 29 Jun 2018 18:19:40 -0400 Received: from aserp2130.oracle.com ([141.146.126.79]:50176) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fZ1js-0007Qh-Hf for qemu-devel@nongnu.org; Fri, 29 Jun 2018 18:19:36 -0400 Received: from pps.filterd (aserp2130.oracle.com [127.0.0.1]) by aserp2130.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w5TMJJmS082596; Fri, 29 Jun 2018 22:19:33 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=corp-2017-10-26; bh=t1OsBmfBVQyuoTea/wK6gCLYid/zua7JAczGhSF3SJA=; b=WYZswAzgFv6gHL57/2pc/LoPWAhTkkeGmjPB2iUK+nt5KcORV+Aw6p7lt68UWjdrDCUU zVm994Fad6XWZAmeO7a47Hu7f2ZyeCixcQY3TR0agus5XUmw49JVnOXat1rW53Sf7Yc/ cliclwlzlnWja0tqpt5+6CTeKjjHh+q4igJMyaTw4x4KBqJ0XB0oAQ1L09Ivn0zX+IMw v6rgOyjCUbXeEhngbL/ft/3HrtW45Kt2OFC80cYqFaQsOfLuHSpbIzhIrnOZOq9hgbC4 1QXjso12k/XhQJOW7zbXpzntVRXAgkJ5hcHgqfbWXds7OyS/QXxU4IYOmMEq9X1Q9nVv wQ== Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by aserp2130.oracle.com with ESMTP id 2jukmu85wm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 29 Jun 2018 22:19:33 +0000 Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by aserv0021.oracle.com (8.14.4/8.14.4) with ESMTP id w5TMJWq3010111 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 29 Jun 2018 22:19:33 GMT Received: from abhmp0004.oracle.com (abhmp0004.oracle.com [141.146.116.10]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w5TMJWY0014412; Fri, 29 Jun 2018 22:19:32 GMT Received: from troi.attlocal.net (/10.154.170.104) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Fri, 29 Jun 2018 15:19:32 -0700 From: Venu Busireddy To: venu.busireddy@oracle.com, "Michael S . Tsirkin" , Marcel Apfelbaum Date: Fri, 29 Jun 2018 17:19:05 -0500 Message-Id: <20180629221907.3662-3-venu.busireddy@oracle.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180629221907.3662-1-venu.busireddy@oracle.com> References: <20180629221907.3662-1-venu.busireddy@oracle.com> X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8939 signatures=668703 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1806210000 definitions=main-1806290237 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 141.146.126.79 Subject: [Qemu-devel] [PATCH v3 2/3] Add "Group Identifier" support to Red Hat PCI bridge. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: virtio-dev@lists.oasis-open.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add the "Vendor-Specific" capability to the Red Hat PCI bridge device "pci-bridge", to contain the "Group Identifier" that will be used to pair a virtio device with the passthrough device attached to that bridge. Also, change the Device ID of the bridge to PCI_DEVICE_ID_REDHAT_BRIDGE_FAILOVER to avoid confusion with bridges that don't have this capability. This capability is added to the bridge iff the "failover-group-id" option is specified for the bridge. Signed-off-by: Venu Busireddy --- hw/pci-bridge/pci_bridge_dev.c | 10 ++++++++++ hw/pci/pci_bridge.c | 34 +++++++++++++++++++++++++++++++++ include/hw/pci/pci.h | 35 +++++++++++++++++----------------- include/hw/pci/pci_bridge.h | 2 ++ 4 files changed, 64 insertions(+), 17 deletions(-) diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c index b2d861d216..d3879071a8 100644 --- a/hw/pci-bridge/pci_bridge_dev.c +++ b/hw/pci-bridge/pci_bridge_dev.c @@ -71,6 +71,13 @@ static void pci_bridge_dev_realize(PCIDevice *dev, Error **errp) bridge_dev->msi = ON_OFF_AUTO_OFF; } + err = pci_bridge_vendor_init(dev, 0, PCI_DEVICE_ID_REDHAT_BRIDGE_FAILOVER, + errp); + if (err < 0) { + error_append_hint(errp, "Can't init group ID, error %d\n", err); + goto vendor_cap_err; + } + err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0, errp); if (err) { goto slotid_error; @@ -109,6 +116,7 @@ slotid_error: if (shpc_present(dev)) { shpc_cleanup(dev, &bridge_dev->bar); } +vendor_cap_err: shpc_error: pci_bridge_exitfn(dev); } @@ -162,6 +170,8 @@ static Property pci_bridge_dev_properties[] = { ON_OFF_AUTO_AUTO), DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags, PCI_BRIDGE_DEV_F_SHPC_REQ, true), + DEFINE_PROP_UINT64(COMPAT_PROP_FAILOVER_GROUP_ID, + PCIDevice, failover_group_id, ULLONG_MAX), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 40a39f57cb..68cc619c20 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -40,6 +40,10 @@ #define PCI_SSVID_SVID 4 #define PCI_SSVID_SSID 6 +#define PCI_VENDOR_SIZEOF 12 +#define PCI_VENDOR_CAP_LEN_OFFSET 2 +#define PCI_VENDOR_GROUP_ID_OFFSET 4 + int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset, uint16_t svid, uint16_t ssid, Error **errp) @@ -57,6 +61,36 @@ int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset, return pos; } +int pci_bridge_vendor_init(PCIDevice *d, uint8_t offset, + uint16_t device_id, Error **errp) +{ + int pos; + PCIDeviceClass *dc = PCI_DEVICE_GET_CLASS(d); + + if (d->failover_group_id == ULLONG_MAX) { + return 0; + } + + pos = pci_add_capability(d, PCI_CAP_ID_VNDR, offset, PCI_VENDOR_SIZEOF, + errp); + if (pos < 0) { + return pos; + } + + /* + * Tweak the Device ID to avoid confusion + * with bridges that don't have the group id capability. + */ + dc->device_id = device_id; + pci_set_word(d->config + PCI_DEVICE_ID, device_id); + + pci_set_word(d->config + pos + PCI_VENDOR_CAP_LEN_OFFSET, + PCI_VENDOR_SIZEOF); + memcpy(d->config + pos + PCI_VENDOR_GROUP_ID_OFFSET, + &d->failover_group_id, sizeof(uint64_t)); + return pos; +} + /* Accessor function to get parent bridge device from pci bus. */ PCIDevice *pci_bridge_get_device(PCIBus *bus) { diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index b59c3e7e38..bc38032761 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -86,23 +86,24 @@ extern bool pci_available; #define PCI_DEVICE_ID_VIRTIO_9P 0x1009 #define PCI_DEVICE_ID_VIRTIO_VSOCK 0x1012 -#define PCI_VENDOR_ID_REDHAT 0x1b36 -#define PCI_DEVICE_ID_REDHAT_BRIDGE 0x0001 -#define PCI_DEVICE_ID_REDHAT_SERIAL 0x0002 -#define PCI_DEVICE_ID_REDHAT_SERIAL2 0x0003 -#define PCI_DEVICE_ID_REDHAT_SERIAL4 0x0004 -#define PCI_DEVICE_ID_REDHAT_TEST 0x0005 -#define PCI_DEVICE_ID_REDHAT_ROCKER 0x0006 -#define PCI_DEVICE_ID_REDHAT_SDHCI 0x0007 -#define PCI_DEVICE_ID_REDHAT_PCIE_HOST 0x0008 -#define PCI_DEVICE_ID_REDHAT_PXB 0x0009 -#define PCI_DEVICE_ID_REDHAT_BRIDGE_SEAT 0x000a -#define PCI_DEVICE_ID_REDHAT_PXB_PCIE 0x000b -#define PCI_DEVICE_ID_REDHAT_PCIE_RP 0x000c -#define PCI_DEVICE_ID_REDHAT_XHCI 0x000d -#define PCI_DEVICE_ID_REDHAT_PCIE_BRIDGE 0x000e -#define PCI_DEVICE_ID_REDHAT_MDPY 0x000f -#define PCI_DEVICE_ID_REDHAT_QXL 0x0100 +#define PCI_VENDOR_ID_REDHAT 0x1b36 +#define PCI_DEVICE_ID_REDHAT_BRIDGE 0x0001 +#define PCI_DEVICE_ID_REDHAT_SERIAL 0x0002 +#define PCI_DEVICE_ID_REDHAT_SERIAL2 0x0003 +#define PCI_DEVICE_ID_REDHAT_SERIAL4 0x0004 +#define PCI_DEVICE_ID_REDHAT_TEST 0x0005 +#define PCI_DEVICE_ID_REDHAT_ROCKER 0x0006 +#define PCI_DEVICE_ID_REDHAT_SDHCI 0x0007 +#define PCI_DEVICE_ID_REDHAT_PCIE_HOST 0x0008 +#define PCI_DEVICE_ID_REDHAT_PXB 0x0009 +#define PCI_DEVICE_ID_REDHAT_BRIDGE_SEAT 0x000a +#define PCI_DEVICE_ID_REDHAT_PXB_PCIE 0x000b +#define PCI_DEVICE_ID_REDHAT_PCIE_RP 0x000c +#define PCI_DEVICE_ID_REDHAT_XHCI 0x000d +#define PCI_DEVICE_ID_REDHAT_PCIE_BRIDGE 0x000e +#define PCI_DEVICE_ID_REDHAT_MDPY 0x000f +#define PCI_DEVICE_ID_REDHAT_BRIDGE_FAILOVER 0x0010 +#define PCI_DEVICE_ID_REDHAT_QXL 0x0100 #define FMT_PCIBUS PRIx64 diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h index 0347da52d2..aa471ec5a4 100644 --- a/include/hw/pci/pci_bridge.h +++ b/include/hw/pci/pci_bridge.h @@ -83,6 +83,8 @@ struct PCIBridge { int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset, uint16_t svid, uint16_t ssid, Error **errp); +int pci_bridge_vendor_init(PCIDevice *dev, uint8_t offset, + uint16_t device_id, Error **errp); PCIDevice *pci_bridge_get_device(PCIBus *bus); PCIBus *pci_bridge_get_sec_bus(PCIBridge *br);