From patchwork Wed Aug 29 01:16:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 10579407 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 14D5F920 for ; Wed, 29 Aug 2018 01:19:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 06A3B2A9C9 for ; Wed, 29 Aug 2018 01:19:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id ED5612A9CE; Wed, 29 Aug 2018 01:19:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.3 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,FREEMAIL_FROM,FROM_LOCAL_NOVOWEL,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 64C0B2A9C9 for ; Wed, 29 Aug 2018 01:19:46 +0000 (UTC) Received: from localhost ([::1]:40762 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fup97-0003Ft-Dt for patchwork-qemu-devel@patchwork.kernel.org; Tue, 28 Aug 2018 21:19:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51905) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fup6d-0000N3-1n for qemu-devel@nongnu.org; Tue, 28 Aug 2018 21:17:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fup6b-0003s0-WB for qemu-devel@nongnu.org; Tue, 28 Aug 2018 21:17:10 -0400 Received: from mail-lf1-x131.google.com ([2a00:1450:4864:20::131]:38541) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fup6b-0003ro-O8 for qemu-devel@nongnu.org; Tue, 28 Aug 2018 21:17:09 -0400 Received: by mail-lf1-x131.google.com with SMTP id i7-v6so2906453lfh.5 for ; Tue, 28 Aug 2018 18:17:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lh5HjHdfrtnWy5rfhcVT0mWqyMk/FfycdA0GgSnzLYA=; b=LgNIphHxsHmEpmhLmC1Z125YuzYRtHlRpbYONBxa7fDQG9z7EbQpubDT9rNypjTU5G dks6No+VY+6belTW4AH8fliBrf4qbCqWI0rmMZUgVuByxRduJ+hTjbyLh9/qTe87Pkro HOKN63EWQ6TjSqrTeHC1fLsj0TUlkg4yFG2k76EYgwXxCVbUt/LC2aGyJDmcDX4R8W+4 cuzFmpdlZAGX+U5rd8BokoTlutEA1T/1lf+OCBTL+HaNJVDhSD20HAkwJ96NsJLbCpIs evlF6N04Xtaa27rMDhoUruXyld8ocWHWur3boAGMwyC9cj/yuPgBUyzh2qB2h1mdctXV GsGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lh5HjHdfrtnWy5rfhcVT0mWqyMk/FfycdA0GgSnzLYA=; b=Yyt0ZUiBGjSUHwiXop1B/OikONgPg1D3X/wn+JEmJmWLtwHEuUWghtk/jMptqijYPF VfAc3x65akGsliF/4yHg91+Nlk4OesWbmgzfPB0u07viREiOhIaHSMuNmF55MVgZTDnB +uAoeootjs4eFNWBD3FBUB62oE8WiUntCk9zOV21Y2DVkHG3bdO4qCvJ5zej8xMnhnQH qt32lslm2X19wYqgiL7Av9y2re7NmpyhtyWboolGtRBeH7H6sS4LsEz1hpyL5X0/9Akd zaqzFjwa/7vN4GA8gnHqLAiOtBbEzPijJ8joIXYl0B1JY2UsrCroByi5MKUj0H5rvBKt IgPQ== X-Gm-Message-State: APzg51DNwdBs6Xqle+ViyLspk5T8vzjIdWB8mSqtxyIhu72gy/hYGbei Lp3Ps+s+RGHjapTt/5kheQAqZFPr X-Google-Smtp-Source: ANB0VdafdwLh1RMXZAz5ZxB9DIo3SH3+RxY38pfjGrWulHmAZpVDkijI2rz/RdS3ijTTmMbBNFt+BQ== X-Received: by 2002:a19:d769:: with SMTP id o102-v6mr2280130lfg.106.1535505428177; Tue, 28 Aug 2018 18:17:08 -0700 (PDT) Received: from octofox.hsd1.ca.comcast.net. (jcmvbkbc-1-pt.tunnel.tserv24.sto1.ipv6.he.net. [2001:470:27:1fa::2]) by smtp.gmail.com with ESMTPSA id l14-v6sm460143ljh.91.2018.08.28.18.17.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 28 Aug 2018 18:17:07 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Date: Tue, 28 Aug 2018 18:16:51 -0700 Message-Id: <20180829011652.4466-2-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180829011652.4466-1-jcmvbkbc@gmail.com> References: <20180829011652.4466-1-jcmvbkbc@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::131 Subject: [Qemu-devel] [PATCH v2 1/2] target/xtensa: convert to do_transaction_failed X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Max Filippov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Max Filippov Reviewed-by: Peter Maydell --- Changes v1->v2: - change ldl_phys to address_space_ldl in get_pte and check transaction for success; target/xtensa/cpu.c | 2 +- target/xtensa/cpu.h | 7 ++++--- target/xtensa/helper.c | 22 +++++++++++++++++++--- target/xtensa/op_helper.c | 12 +++++++----- 4 files changed, 31 insertions(+), 12 deletions(-) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 590813d4f7b9..a54dbe42602d 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -186,7 +186,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data) #else cc->do_unaligned_access = xtensa_cpu_do_unaligned_access; cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug; - cc->do_unassigned_access = xtensa_cpu_do_unassigned_access; + cc->do_transaction_failed = xtensa_cpu_do_transaction_failed; #endif cc->debug_excp_handler = xtensa_breakpoint_handler; cc->disas_set_info = xtensa_cpu_disas_set_info; diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 7472cf3ca32a..1362772617ea 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -497,9 +497,10 @@ int xtensa_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, int size, int mmu_idx); void xtensa_cpu_do_interrupt(CPUState *cpu); bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request); -void xtensa_cpu_do_unassigned_access(CPUState *cpu, hwaddr addr, - bool is_write, bool is_exec, int opaque, - unsigned size); +void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, + unsigned size, MMUAccessType access_type, + int mmu_idx, MemTxAttrs attrs, + MemTxResult response, uintptr_t retaddr); void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c index f74636f67854..0484f5fab808 100644 --- a/target/xtensa/helper.c +++ b/target/xtensa/helper.c @@ -642,11 +642,27 @@ static int get_pte(CPUXtensaState *env, uint32_t vaddr, uint32_t *pte) int ret = get_physical_addr_mmu(env, false, pt_vaddr, 0, 0, &paddr, &page_size, &access, false); - qemu_log_mask(CPU_LOG_MMU, "%s: trying autorefill(%08x) -> %08x\n", - __func__, vaddr, ret ? ~0 : paddr); + if (ret == 0) { + qemu_log_mask(CPU_LOG_MMU, + "%s: autorefill(%08x): PTE va = %08x, pa = %08x\n", + __func__, vaddr, pt_vaddr, paddr); + } else { + qemu_log_mask(CPU_LOG_MMU, + "%s: autorefill(%08x): PTE va = %08x, failed (%d)\n", + __func__, vaddr, pt_vaddr, ret); + } if (ret == 0) { - *pte = ldl_phys(cs->as, paddr); + MemTxResult result; + + *pte = address_space_ldl(cs->as, paddr, MEMTXATTRS_UNSPECIFIED, + &result); + if (result != MEMTX_OK) { + qemu_log_mask(CPU_LOG_MMU, + "%s: couldn't load PTE: transaction failed (%u)\n", + __func__, (unsigned)result); + ret = 1; + } } return ret; } diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index d4c942d87980..06fe346f02ff 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -78,18 +78,20 @@ void tlb_fill(CPUState *cs, target_ulong vaddr, int size, } } -void xtensa_cpu_do_unassigned_access(CPUState *cs, hwaddr addr, - bool is_write, bool is_exec, int opaque, - unsigned size) +void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, + unsigned size, MMUAccessType access_type, + int mmu_idx, MemTxAttrs attrs, + MemTxResult response, uintptr_t retaddr) { XtensaCPU *cpu = XTENSA_CPU(cs); CPUXtensaState *env = &cpu->env; + cpu_restore_state(cs, retaddr, true); HELPER(exception_cause_vaddr)(env, env->pc, - is_exec ? + access_type == MMU_INST_FETCH ? INSTR_PIF_ADDR_ERROR_CAUSE : LOAD_STORE_PIF_ADDR_ERROR_CAUSE, - is_exec ? addr : cs->mem_io_vaddr); + addr); } static void tb_invalidate_virtual_addr(CPUXtensaState *env, uint32_t vaddr)