@@ -1,3 +1,5 @@
+#include "core-isa.h"
+
.macro vector name
.section .vector.\name
@@ -20,19 +22,33 @@ handler_\name\(): .word 0
.endm
+#if XCHAL_HAVE_WINDOWED
vector window_overflow_4
vector window_overflow_8
vector window_overflow_12
vector window_underflow_4
vector window_underflow_8
vector window_underflow_12
+#endif
+#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 2
vector level2
+#endif
+#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 3
vector level3
+#endif
+#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 4
vector level4
+#endif
+#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 5
vector level5
+#endif
+#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 6
vector level6
+#endif
+#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 7
vector level7
+#endif
vector kernel
vector user
Don't generate handlers for IRQ levels that are not defined for the CPU or for window overflow/underflow exceptions for configs w/o windowed registers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> --- tests/tcg/xtensa/vectors.S | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)