From patchwork Mon Oct 29 23:20:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 10660377 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 31E3213B5 for ; Mon, 29 Oct 2018 23:24:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 045C129CEA for ; Mon, 29 Oct 2018 23:24:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D42BB286E6; Mon, 29 Oct 2018 23:24:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B8B4F286E6 for ; Mon, 29 Oct 2018 23:24:54 +0000 (UTC) Received: from localhost ([::1]:49565 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gHGty-0004oj-67 for patchwork-qemu-devel@patchwork.kernel.org; Mon, 29 Oct 2018 19:24:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47537) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gHGqo-0001Ni-9v for qemu-devel@nongnu.org; Mon, 29 Oct 2018 19:21:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gHGqn-0000FQ-7f for qemu-devel@nongnu.org; Mon, 29 Oct 2018 19:21:38 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54764) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gHGqZ-0008Tm-UU; Mon, 29 Oct 2018 19:21:25 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 18C264E90D; Mon, 29 Oct 2018 23:21:22 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-38.brq.redhat.com [10.40.204.38]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B1FE119489; Mon, 29 Oct 2018 23:21:18 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Peter Maydell , Guenter Roeck , "Edgar E. Iglesias" , Igor Mitsyanko , Alistair Francis Date: Tue, 30 Oct 2018 00:20:59 +0100 Message-Id: <20181029232100.8454-3-philmd@redhat.com> In-Reply-To: <20181029232100.8454-1-philmd@redhat.com> References: <20181029232100.8454-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Mon, 29 Oct 2018 23:21:22 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 2/3] hw/dma/pl330: Factor out pl330_init() from hw/arm/xilinx_zynq.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- MAINTAINERS | 1 + hw/arm/xilinx_zynq.c | 18 ++---------------- hw/dma/pl330.c | 2 +- include/hw/dma/pl330.h | 41 +++++++++++++++++++++++++++++++++++++++++ 4 files changed, 45 insertions(+), 17 deletions(-) create mode 100644 include/hw/dma/pl330.h diff --git a/MAINTAINERS b/MAINTAINERS index d794bd7a66..647e2aa0d5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -452,6 +452,7 @@ F: hw/display/pl110* F: hw/dma/pl080.c F: include/hw/dma/pl080.h F: hw/dma/pl330.c +F: include/hw/dma/pl330.h F: hw/gpio/pl061.c F: hw/input/pl050.c F: hw/intc/pl190.c diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 57497b0c4d..a4c4d44f00 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -34,6 +34,7 @@ #include "hw/char/cadence_uart.h" #include "hw/net/cadence_gem.h" #include "hw/cpu/a9mpcore.h" +#include "hw/dma/pl330.h" #define NUM_SPI_FLASHES 4 #define NUM_QSPI_FLASHES 2 @@ -278,22 +279,7 @@ static void zynq_init(MachineState *machine) sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xF8007100); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[39-IRQ_OFFSET]); - dev = qdev_create(NULL, "pl330"); - qdev_prop_set_uint8(dev, "num_chnls", 8); - qdev_prop_set_uint8(dev, "num_periph_req", 4); - qdev_prop_set_uint8(dev, "num_events", 16); - - qdev_prop_set_uint8(dev, "data_width", 64); - qdev_prop_set_uint8(dev, "wr_cap", 8); - qdev_prop_set_uint8(dev, "wr_q_dep", 16); - qdev_prop_set_uint8(dev, "rd_cap", 8); - qdev_prop_set_uint8(dev, "rd_q_dep", 16); - qdev_prop_set_uint16(dev, "data_buffer_dep", 256); - - qdev_init_nofail(dev); - busdev = SYS_BUS_DEVICE(dev); - sysbus_mmio_map(busdev, 0, 0xF8003000); - sysbus_connect_irq(busdev, 0, pic[45-IRQ_OFFSET]); /* abort irq line */ + pl330_init(0xf8003000, pic[45 - IRQ_OFFSET], 4); /* abort irq line */ for (n = 0; n < ARRAY_SIZE(dma_irqs); ++n) { /* event irqs */ sysbus_connect_irq(busdev, n + 1, pic[dma_irqs[n] - IRQ_OFFSET]); } diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c index d071049233..711cf9a605 100644 --- a/hw/dma/pl330.c +++ b/hw/dma/pl330.c @@ -20,6 +20,7 @@ #include "qemu/timer.h" #include "sysemu/dma.h" #include "qemu/log.h" +#include "hw/dma/pl330.h" #ifndef PL330_ERR_DEBUG #define PL330_ERR_DEBUG 0 @@ -271,7 +272,6 @@ struct PL330State { }; -#define TYPE_PL330 "pl330" #define PL330(obj) OBJECT_CHECK(PL330State, (obj), TYPE_PL330) static const VMStateDescription vmstate_pl330 = { diff --git a/include/hw/dma/pl330.h b/include/hw/dma/pl330.h new file mode 100644 index 0000000000..9a586c0df9 --- /dev/null +++ b/include/hw/dma/pl330.h @@ -0,0 +1,41 @@ +/* + * ARM PrimeCell PL330 DMA Controller + * + * Copyright (c) 2009 Samsung Electronics. + * Contributed by Kirill Batuzov + * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com) + * Copyright (c) 2012 PetaLogix Pty Ltd. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HW_DMA_PL330_H +#define HW_DMA_PL330_H + +#include "hw/sysbus.h" + +#define TYPE_PL330 "pl330" + +static inline void pl330_init(uint32_t base, qemu_irq irq, int nreq) +{ + SysBusDevice *busdev; + DeviceState *dev; + + dev = qdev_create(NULL, TYPE_PL330); + qdev_prop_set_uint8(dev, "num_chnls", 8); + qdev_prop_set_uint8(dev, "num_periph_req", nreq); + qdev_prop_set_uint8(dev, "num_events", 16); + qdev_prop_set_uint8(dev, "data_width", 64); + qdev_prop_set_uint8(dev, "wr_cap", 8); + qdev_prop_set_uint8(dev, "wr_q_dep", 16); + qdev_prop_set_uint8(dev, "rd_cap", 8); + qdev_prop_set_uint8(dev, "rd_q_dep", 16); + qdev_prop_set_uint16(dev, "data_buffer_dep", 256); + qdev_init_nofail(dev); + + busdev = SYS_BUS_DEVICE(dev); + sysbus_mmio_map(busdev, 0, base); + sysbus_connect_irq(busdev, 0, irq); +} + +#endif /* HW_DMA_PL330_H */