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DIR:OUT; SFP:1102; SCL:1; SRVR:DM6PR01MB4700; H:DM6PR01MB4825.prod.exchangelabs.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:0; received-spf: None (protection.outlook.com: os.amperecomputing.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: tWQkC2Se+/qOsVN1nX5N8zVWBpGnKE+hCyacoI4l2OGaaXHqIzWhKECkZ/7C5vGIz+Pyzg/XsrdU7YljnkemD3Kj5kX6PGfg5rbdYeKfW0tln+GPnO/OwoBA7iRP3kpABTkrIGpXy8f32o2IR0Y9A3cBN8UNoRojBNaMmkDBjpiwi13qZ9n8owibvgcKtW0hT4F83Rs7KDwIMMiyauyJUeHEfPquM0KtwzNgzaprJuPGgGKX54jKRJkAU8gyp0zDB3SnpL0xdILM7J3iU9Q9pFbxVBfF4QkZK25xeQpUWgicIPlreLmHKozp5ArD7MhMffT0Id6U3xT+WwY75wamNPTCbOOgYdGcUTmRCwOYKXE= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: fe329a51-575b-45d6-05ab-08d65ab79f1d X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Dec 2018 13:43:21.7154 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR01MB4700 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 40.107.70.113 Subject: [Qemu-devel] [PATCH v9 07/14] target/arm: Define FIELDs for ID_DFR0 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aaron Lindsay , Michael Spradling , "qemu-devel@nongnu.org" , Digant Desai Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP This is immediately necessary for the PMUv3 implementation to check ID_DFR0.PerfMon to enable/disable specific features, but defines the full complement of fields for possible future use elsewhere. Signed-off-by: Aaron Lindsay Reviewed-by: Peter Maydell --- target/arm/cpu.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 627e5c1995..304e6e47b3 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1586,6 +1586,14 @@ FIELD(ID_AA64PFR0, GIC, 24, 4) FIELD(ID_AA64PFR0, RAS, 28, 4) FIELD(ID_AA64PFR0, SVE, 32, 4) +FIELD(ID_DFR0, COPDBG, 0, 4) +FIELD(ID_DFR0, COPSDBG, 4, 4) +FIELD(ID_DFR0, MMAPDBG, 8, 4) +FIELD(ID_DFR0, COPTRC, 12, 4) +FIELD(ID_DFR0, MMAPTRC, 16, 4) +FIELD(ID_DFR0, MPROFDBG, 20, 4) +FIELD(ID_DFR0, PERFMON, 24, 4) + QEMU_BUILD_BUG_ON(ARRAY_SIZE(((ARMCPU *)0)->ccsidr) <= R_V7M_CSSELR_INDEX_MASK); /* If adding a feature bit which corresponds to a Linux ELF