From patchwork Wed Dec 26 17:19:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 10743241 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8E44413A4 for ; Wed, 26 Dec 2018 17:25:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6DA50287AC for ; Wed, 26 Dec 2018 17:25:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5B56E287B1; Wed, 26 Dec 2018 17:25:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D82D7287AC for ; Wed, 26 Dec 2018 17:25:18 +0000 (UTC) Received: from localhost ([127.0.0.1]:47420 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gcCvm-0001pL-3C for patchwork-qemu-devel@patchwork.kernel.org; Wed, 26 Dec 2018 12:25:18 -0500 Received: from eggs.gnu.org ([208.118.235.92]:47887) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gcCrD-00043s-LQ for qemu-devel@nongnu.org; Wed, 26 Dec 2018 12:20:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gcCrC-0007pD-5e for qemu-devel@nongnu.org; Wed, 26 Dec 2018 12:20:35 -0500 Received: from mail-qk1-x744.google.com ([2607:f8b0:4864:20::744]:45048) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gcCrB-0007jW-P5 for qemu-devel@nongnu.org; Wed, 26 Dec 2018 12:20:33 -0500 Received: by mail-qk1-x744.google.com with SMTP id n12so9610966qkh.11 for ; Wed, 26 Dec 2018 09:20:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=subject:date:message-id:in-reply-to:references:cc:from:to; bh=ZFe5OLfgkbGyNHW683WS7kU/EYaB5fvA+Mo6gZiihOw=; b=Vfgg9CZrTv0cwyLnFnWG7d5M0TjayKVr2eT51Y9c+Pgrt2sha/s8AcVKLtp1xbt5N+ 1F//W738G41VBkuvCJMK4eNTqutx73qZ10+wLEFXZX/jdkjGbYUrQS/ccXsVD+VL6RjR eGgxdc36rQDa0LpxHvXqU5gmWLRAUSQKzswZvZis0cI2M1KOXQIcXcVkyGeVTOiVdfLp QpSD2KwH8VDxRXkbKDdHOeIgpPiJlBGkTPbNhVJQtEN6R4+GjcatJMUdMMf1Japfz6fi 9UnLTjso3PCYhQOxLizcItsc2771rB7THFzXXnfk7IjKoOHoPL1WV2EQYiuNWbjvZBWX VXBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:date:message-id:in-reply-to:references :cc:from:to; bh=ZFe5OLfgkbGyNHW683WS7kU/EYaB5fvA+Mo6gZiihOw=; b=O0k5nLBDhALpRVf/dCTEEKmx3c2XOgKJLclZB1BMpTn1rYVs6FFOY1Iowj3F/HfvrT QFxwD3cYm2zCJGyYOzgvblfl8S27jn06B+9BY8DszcLFFZuVs0EPmWw7KHpaRRVsv/18 movjtH+Y7Hy2HIC0Y0nIqlY2/BAsC6dxoecmnCs3rgc7ioQfn2TbAVPCds3ZqwGSowH4 o7hnqwbBF1lYYyGQ3ULo39Zkz8cvOzIYwI6IlY5VqFGlvWUU2lx42aJHrJmTthbhqe1n 3W1Nyzq2z9rMtrd9ZI7YeG6NZIpdqQWL+HbtbqTuEW8r+R8TiITxCiuzDBoHWftFWD3J NREA== X-Gm-Message-State: AJcUukd81zdKu7rkBpUHFBwc+Vld2OEz/Oxr24BKCOXuX4x9S3Fix0Ck skPyrkd1aSkbPWsudQ7PMdAiYQ== X-Google-Smtp-Source: ALg8bN7j4p0nsFZANa5APqW/P2jQkXnYBfjUCv+nNRuJZ8z4afSTGBC8byBdFnJ6cII5kzYDKfo+6g== X-Received: by 2002:ae9:ec02:: with SMTP id h2mr18970936qkg.84.1545844822985; Wed, 26 Dec 2018 09:20:22 -0800 (PST) Received: from localhost ([2601:182:c980:96c:8dd:4488:90b1:59d1]) by smtp.gmail.com with ESMTPSA id q21sm15040646qtk.79.2018.12.26.09.20.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 26 Dec 2018 09:20:22 -0800 (PST) Date: Wed, 26 Dec 2018 09:19:56 -0800 Message-Id: <20181226172005.26990-6-palmer@sifive.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20181226172005.26990-1-palmer@sifive.com> References: <20181226172005.26990-1-palmer@sifive.com> From: Palmer Dabbelt To: Peter Maydell X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::744 Subject: [Qemu-devel] [PULL 05/14] sifive_u: Add clock DT node for GEM ethernet X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Palmer Dabbelt , qemu-riscv@nongnu.org, Anup Patel , Anup Patel , qemu-devel@nongnu.org, Alistair Francis Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Anup Patel The GEM ethernet on SiFive unleashed has fixed input clock of 125MHz as-per SiFive FU540 manual. This patch updates FDT generation for QEMU sifive_u machine to provide fixed-rate clock for GEM ethernet. Signed-off-by: Anup Patel Signed-off-by: Anup Patel Signed-off-by: Alistair Francis Reviewed-by: Palmer Dabbelt Signed-off-by: Palmer Dabbelt --- hw/riscv/sifive_u.c | 18 +++++++++++++++++- include/hw/riscv/sifive_u.h | 3 ++- 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index ef07df244241..5c41ee5017e4 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -85,7 +85,8 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, int cpu; uint32_t *cells; char *nodename; - uint32_t plic_phandle; + char ethclk_names[] = "pclk\0hclk\0tx_clk"; + uint32_t plic_phandle, ethclk_phandle; fdt = s->fdt = create_device_tree(&s->fdt_size); if (!fdt) { @@ -197,6 +198,17 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, g_free(cells); g_free(nodename); + nodename = g_strdup_printf("/soc/ethclk"); + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_string(fdt, nodename, "compatible", "fixed-clock"); + qemu_fdt_setprop_cell(fdt, nodename, "#clock-cells", 0x0); + qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", + SIFIVE_U_GEM_CLOCK_FREQ); + qemu_fdt_setprop_cell(fdt, nodename, "phandle", 3); + qemu_fdt_setprop_cell(fdt, nodename, "linux,phandle", 3); + ethclk_phandle = qemu_fdt_get_phandle(fdt, nodename); + g_free(nodename); + nodename = g_strdup_printf("/soc/ethernet@%lx", (long)memmap[SIFIVE_U_GEM].base); qemu_fdt_add_subnode(fdt, nodename); @@ -208,6 +220,10 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, qemu_fdt_setprop_string(fdt, nodename, "phy-mode", "gmii"); qemu_fdt_setprop_cells(fdt, nodename, "interrupt-parent", plic_phandle); qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ); + qemu_fdt_setprop_cells(fdt, nodename, "clocks", + ethclk_phandle, ethclk_phandle, ethclk_phandle); + qemu_fdt_setprop(fdt, nodename, "clocks-names", ethclk_names, + sizeof(ethclk_names)); qemu_fdt_setprop_cells(fdt, nodename, "#address-cells", 1); qemu_fdt_setprop_cells(fdt, nodename, "#size-cells", 0); g_free(nodename); diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index e8b4d9ffa3fb..be13cc1304cc 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -63,7 +63,8 @@ enum { }; enum { - SIFIVE_U_CLOCK_FREQ = 1000000000 + SIFIVE_U_CLOCK_FREQ = 1000000000, + SIFIVE_U_GEM_CLOCK_FREQ = 125000000 }; #define SIFIVE_U_PLIC_HART_CONFIG "MS"