From patchwork Mon Jan 28 11:05:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 10783595 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7D0076C2 for ; Mon, 28 Jan 2019 11:12:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 624802A968 for ; Mon, 28 Jan 2019 11:12:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5F9472A96A; Mon, 28 Jan 2019 11:12:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 73B6B2A992 for ; Mon, 28 Jan 2019 11:12:01 +0000 (UTC) Received: from localhost ([127.0.0.1]:57991 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1go4pc-0006p7-4l for patchwork-qemu-devel@patchwork.kernel.org; Mon, 28 Jan 2019 06:12:00 -0500 Received: from eggs.gnu.org ([209.51.188.92]:56126) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1go4l0-0003t3-9h for qemu-devel@nongnu.org; Mon, 28 Jan 2019 06:07:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1go4kx-00049s-Om for qemu-devel@nongnu.org; Mon, 28 Jan 2019 06:07:14 -0500 Received: from szxga06-in.huawei.com ([45.249.212.32]:33554 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1go4ki-00043p-Is; Mon, 28 Jan 2019 06:06:58 -0500 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id BA4BABAE56610C0C2D5; Mon, 28 Jan 2019 19:06:53 +0800 (CST) Received: from S00345302A-PC.china.huawei.com (10.202.227.237) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.408.0; Mon, 28 Jan 2019 19:06:45 +0800 From: Shameer Kolothum To: , , , , , Date: Mon, 28 Jan 2019 11:05:44 +0000 Message-ID: <20190128110545.20644-3-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20190128110545.20644-1-shameerali.kolothum.thodi@huawei.com> References: <20190128110545.20644-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.227.237] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 45.249.212.32 Subject: [Qemu-devel] [RFC PATCH 2/4] hw/arm/virt: Add GPIO based pcdimm hotplug ACPI event support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxarm@huawei.com, xuwei5@huawei.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP This adds support for using PL061 GPIO controller pin to trigger pcdimm hotplug event to guest. Signed-off-by: Shameer Kolothum --- default-configs/arm-softmmu.mak | 1 + hw/arm/virt-acpi-build.c | 28 ++++++++++++++++++++++++---- hw/arm/virt.c | 37 +++++++++++++++++++++++++++++++++---- include/hw/arm/virt.h | 14 ++++++++++++++ 4 files changed, 72 insertions(+), 8 deletions(-) diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak index 5deabc1..ebbc67b 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -163,3 +163,4 @@ CONFIG_MEM_DEVICE=y CONFIG_DIMM=y CONFIG_NVDIMM=y CONFIG_ACPI_NVDIMM=y +CONFIG_ACPI_MEMORY_HOTPLUG=y diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index ab30e28..eedd323 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -40,6 +40,7 @@ #include "hw/loader.h" #include "hw/hw.h" #include "hw/acpi/aml-build.h" +#include "hw/acpi/memory_hotplug.h" #include "hw/pci/pcie_host.h" #include "hw/pci/pci.h" #include "hw/arm/virt.h" @@ -327,8 +328,10 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, } static void acpi_dsdt_add_gpio(Aml *scope, const MemMapEntry *gpio_memmap, - uint32_t gpio_irq) + uint32_t gpio_irq, VirtMachineState *vms) { + uint32_t pin_list[1]; + Aml *dev = aml_device("GPO0"); aml_append(dev, aml_name_decl("_HID", aml_string("ARMH0061"))); aml_append(dev, aml_name_decl("_ADR", aml_int(0))); @@ -342,11 +345,21 @@ static void acpi_dsdt_add_gpio(Aml *scope, const MemMapEntry *gpio_memmap, aml_append(dev, aml_name_decl("_CRS", crs)); Aml *aei = aml_resource_template(); - /* Pin 3 for power button */ - const uint32_t pin_list[1] = {3}; + + /* GPIO Interrupt connection descriptor for power button */ + pin_list[0] = GPIO_PWRB; aml_append(aei, aml_gpio_int(AML_CONSUMER, AML_EDGE, AML_ACTIVE_HIGH, AML_EXCLUSIVE, AML_PULL_UP, 0, pin_list, 1, "GPO0", NULL, 0)); + + if (vms->acpi_memhp_state.is_enabled) { + /* GPIO Interrupt connection descriptor for pc-dimm hotplug */ + pin_list[0] = GPIO_PCDIMM; + aml_append(aei, aml_gpio_int(AML_CONSUMER, AML_EDGE, AML_ACTIVE_HIGH, + AML_EXCLUSIVE, AML_PULL_UP, 0, pin_list, + 1, "GPO0", NULL, 0)); + } + aml_append(dev, aml_name_decl("_AEI", aei)); /* _E03 is handle for power button */ @@ -735,6 +748,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) Aml *scope, *dsdt; const MemMapEntry *memmap = vms->memmap; const int *irqmap = vms->irqmap; + MachineState *ms = MACHINE(vms); + uint32_t nr_mem = ms->ram_slots; dsdt = init_aml_allocator(); /* Reserve space for header */ @@ -756,11 +771,16 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) acpi_dsdt_add_pci(scope, memmap, (irqmap[VIRT_PCIE] + ARM_SPI_BASE), vms->highmem, vms->highmem_ecam); acpi_dsdt_add_gpio(scope, &memmap[VIRT_GPIO], - (irqmap[VIRT_GPIO] + ARM_SPI_BASE)); + (irqmap[VIRT_GPIO] + ARM_SPI_BASE), vms); acpi_dsdt_add_power_button(scope); aml_append(dsdt, scope); + if (vms->acpi_memhp_state.is_enabled) { + build_memory_hotplug_aml(dsdt, nr_mem, "\\_SB.GPO0", + "\\_SB.GPO0._E02", AML_SYSTEM_MEMORY); + } + /* copy AML table into ACPI tables blob and patch header there */ g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len); build_header(linker, table_data, diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 8c6dd59..884960d 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -173,6 +173,9 @@ static const char *valid_cpus[] = { ARM_CPU_TYPE_NAME("max"), }; +static QLIST_HEAD(, GPIODevice) gpio_devices = + QLIST_HEAD_INITIALIZER(gpio_devices); + static bool cpu_type_valid(const char *cpu) { int i; @@ -740,11 +743,34 @@ static void create_rtc(const VirtMachineState *vms, qemu_irq *pic) g_free(nodename); } -static DeviceState *gpio_key_dev; +static DeviceState *virt_get_gpio_dev(int pin) +{ + GPIODevice *gpio_dev; + + QLIST_FOREACH(gpio_dev, &gpio_devices, next) { + if (pin == gpio_dev->pin_num) { + return gpio_dev->dev; + } + } + return NULL; +} + +static void virt_create_gpio_dev(DeviceState *pl061_dev, int pin) +{ + GPIODevice *gpio_dev; + + gpio_dev = g_malloc0(sizeof(*gpio_dev)); + gpio_dev->dev = sysbus_create_simple("gpio-key", -1, + qdev_get_gpio_in(pl061_dev, pin)); + gpio_dev->pin_num = pin; + QLIST_INSERT_HEAD(&gpio_devices, gpio_dev, next); +} + static void virt_powerdown_req(Notifier *n, void *opaque) { + DeviceState *dev = virt_get_gpio_dev(GPIO_PWRB); /* use gpio Pin 3 for power button event */ - qemu_set_irq(qdev_get_gpio_in(gpio_key_dev, 0), 1); + qemu_set_irq(qdev_get_gpio_in(dev, 0), 1); } static Notifier virt_system_powerdown_notifier = { @@ -777,8 +803,11 @@ static void create_gpio(const VirtMachineState *vms, qemu_irq *pic) qemu_fdt_setprop_string(vms->fdt, nodename, "clock-names", "apb_pclk"); qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", phandle); - gpio_key_dev = sysbus_create_simple("gpio-key", -1, - qdev_get_gpio_in(pl061_dev, 3)); + virt_create_gpio_dev(pl061_dev, GPIO_PWRB); + + if (vms->acpi_memhp_state.is_enabled) { + virt_create_gpio_dev(pl061_dev, GPIO_PCDIMM); + } qemu_fdt_add_subnode(vms->fdt, "/gpio-keys"); qemu_fdt_setprop_string(vms->fdt, "/gpio-keys", "compatible", "gpio-keys"); qemu_fdt_setprop_cell(vms->fdt, "/gpio-keys", "#size-cells", 0); diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 6bb7f92..ef39ce6 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -38,6 +38,7 @@ #include "sysemu/kvm.h" #include "hw/intc/arm_gicv3_common.h" #include "hw/mem/nvdimm.h" +#include "hw/acpi/memory_hotplug.h" #define NUM_GICV2M_SPIS 64 #define NUM_VIRTIO_TRANSPORTS 32 @@ -136,8 +137,21 @@ typedef struct { hwaddr high_io_base; bool extended_memmap; AcpiNVDIMMState acpi_nvdimm_state; + MemHotplugState acpi_memhp_state; } VirtMachineState; +/* GPIO pins for ACPI events */ +enum { + GPIO_PCDIMM = 2, + GPIO_PWRB, +}; + +typedef struct GPIODevice { + DeviceState *dev; + int pin_num; + QLIST_ENTRY(GPIODevice) next; +} GPIODevice; + #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt")