| Message ID | 20190213155414.22285-21-palmer@sifive.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/riscv: Convert to decodetree | expand |
On 2/13/19 4:53 PM, Palmer Dabbelt wrote: > From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> > > trans_jalr() is the only caller, so move the code into trans_jalr(). > > Acked-by: Alistair Francis <alistair.francis@wdc.com> > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> > Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de> > --- > target/riscv/insn_trans/trans_rvi.inc.c | 28 +++++++++++++++++- > target/riscv/translate.c | 38 ------------------------- > 2 files changed, 27 insertions(+), 39 deletions(-) > > diff --git a/target/riscv/insn_trans/trans_rvi.inc.c b/target/riscv/insn_trans/trans_rvi.inc.c > index 4a23372cb823..39af38081ede 100644 > --- a/target/riscv/insn_trans/trans_rvi.inc.c > +++ b/target/riscv/insn_trans/trans_rvi.inc.c > @@ -42,7 +42,33 @@ static bool trans_jal(DisasContext *ctx, arg_jal *a) > > static bool trans_jalr(DisasContext *ctx, arg_jalr *a) > { > - gen_jalr(ctx, OPC_RISC_JALR, a->rd, a->rs1, a->imm); > + /* no chaining with JALR */ > + TCGLabel *misaligned = NULL; > + TCGv t0 = tcg_temp_new(); > + > + > + gen_get_gpr(cpu_pc, a->rs1); > + tcg_gen_addi_tl(cpu_pc, cpu_pc, a->imm); > + tcg_gen_andi_tl(cpu_pc, cpu_pc, (target_ulong)-2); > + > + if (!riscv_has_ext(ctx->env, RVC)) { Also has_ext() Cheers, Bastian
diff --git a/target/riscv/insn_trans/trans_rvi.inc.c b/target/riscv/insn_trans/trans_rvi.inc.c index 4a23372cb823..39af38081ede 100644 --- a/target/riscv/insn_trans/trans_rvi.inc.c +++ b/target/riscv/insn_trans/trans_rvi.inc.c @@ -42,7 +42,33 @@ static bool trans_jal(DisasContext *ctx, arg_jal *a) static bool trans_jalr(DisasContext *ctx, arg_jalr *a) { - gen_jalr(ctx, OPC_RISC_JALR, a->rd, a->rs1, a->imm); + /* no chaining with JALR */ + TCGLabel *misaligned = NULL; + TCGv t0 = tcg_temp_new(); + + + gen_get_gpr(cpu_pc, a->rs1); + tcg_gen_addi_tl(cpu_pc, cpu_pc, a->imm); + tcg_gen_andi_tl(cpu_pc, cpu_pc, (target_ulong)-2); + + if (!riscv_has_ext(ctx->env, RVC)) { + misaligned = gen_new_label(); + tcg_gen_andi_tl(t0, cpu_pc, 0x2); + tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0x0, misaligned); + } + + if (a->rd != 0) { + tcg_gen_movi_tl(cpu_gpr[a->rd], ctx->pc_succ_insn); + } + tcg_gen_lookup_and_goto_ptr(); + + if (misaligned) { + gen_set_label(misaligned); + gen_exception_inst_addr_mis(ctx); + } + ctx->base.is_jmp = DISAS_NORETURN; + + tcg_temp_free(t0); return true; } diff --git a/target/riscv/translate.c b/target/riscv/translate.c index c9a8fdda8a85..abdcd0631af4 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -532,44 +532,6 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong imm) ctx->base.is_jmp = DISAS_NORETURN; } -static void gen_jalr(DisasContext *ctx, uint32_t opc, int rd, int rs1, - target_long imm) -{ - /* no chaining with JALR */ - TCGLabel *misaligned = NULL; - TCGv t0 = tcg_temp_new(); - - switch (opc) { - case OPC_RISC_JALR: - gen_get_gpr(cpu_pc, rs1); - tcg_gen_addi_tl(cpu_pc, cpu_pc, imm); - tcg_gen_andi_tl(cpu_pc, cpu_pc, (target_ulong)-2); - - if (!has_ext(ctx, RVC)) { - misaligned = gen_new_label(); - tcg_gen_andi_tl(t0, cpu_pc, 0x2); - tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0x0, misaligned); - } - - if (rd != 0) { - tcg_gen_movi_tl(cpu_gpr[rd], ctx->pc_succ_insn); - } - tcg_gen_lookup_and_goto_ptr(); - - if (misaligned) { - gen_set_label(misaligned); - gen_exception_inst_addr_mis(ctx); - } - ctx->base.is_jmp = DISAS_NORETURN; - break; - - default: - gen_exception_illegal(ctx); - break; - } - tcg_temp_free(t0); -} - static void gen_branch(DisasContext *ctx, uint32_t opc, int rs1, int rs2, target_long bimm) {