From patchwork Wed Feb 13 15:54:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 10810349 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 88A05922 for ; Wed, 13 Feb 2019 16:32:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7648A2E21C for ; Wed, 13 Feb 2019 16:32:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 73BB92E227; Wed, 13 Feb 2019 16:32:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BA0E72E21E for ; Wed, 13 Feb 2019 16:32:28 +0000 (UTC) Received: from localhost ([127.0.0.1]:59725 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gtxSV-0006bX-Cn for patchwork-qemu-devel@patchwork.kernel.org; Wed, 13 Feb 2019 11:32:27 -0500 Received: from eggs.gnu.org ([209.51.188.92]:60264) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gtwto-0002QW-P1 for qemu-devel@nongnu.org; Wed, 13 Feb 2019 10:56:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gtwtN-00031U-UB for qemu-devel@nongnu.org; Wed, 13 Feb 2019 10:56:28 -0500 Received: from mail-pl1-x641.google.com ([2607:f8b0:4864:20::641]:39271) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gtwtN-00023f-JM for qemu-devel@nongnu.org; Wed, 13 Feb 2019 10:56:09 -0500 Received: by mail-pl1-x641.google.com with SMTP id 101so1346998pld.6 for ; Wed, 13 Feb 2019 07:55:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=subject:date:message-id:in-reply-to:references:cc:from:to; bh=GCwODxabK0PbeSCReaoo7dPPIpLzYb/KtB1t0NwFt4U=; b=e49oNbLUI6qdoObg0VNPEAnAc567hESPNiERpgxAAsv281d4GXXmA5qvOkburs88xD OmHZJg9hMiJz9I6nTJ/oLhYQrElLmey7MFdLvXwAY3lz5l70lDbxjZggiSvc9YX8xB1M fWnnVp1I2Ifx3BcYYPgTo3wToM1hJLTkN2DoBzAzHmuhCh7Z0nE/KZbJ3/N+v699Vx3u 9r9mWzDhfKDKG7IzV9F7r5cQXazAcZMF+kgre6rW8QFKrS2lJuRf/jS6JR8vdjwtuB+G 911dNnH+VRor1mWDhM8ozfgbytF+ulJg1IvlZEhuehfyananW7jKU9n3jrE7nXMkTiit cmpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:date:message-id:in-reply-to:references :cc:from:to; bh=GCwODxabK0PbeSCReaoo7dPPIpLzYb/KtB1t0NwFt4U=; b=O+3MnHmvFTNQ0XIs1AgEPJZtM6aim8PqgEXCQXYYrL6KNZoFigeEL5e/QZG5QUUPnJ y4BBvgNyQVPa9vGL/6bCalLFIhQAdVqXUmLHYpbggtIuzFQITxV/ju7iyd9szqafmOes N94ayeQETNF9i/tcEpMHHS3fBidCuQKdz1piAFuUJUhJPmL3wHLZXWxcZTzdCFZk0tZZ WlFjsa2D1SWdNbZvUgIxJBaJzOHFJ9CIJwxFrzlcVkx3CypFQyUkRRV3T2DVduIP5Qr2 J9wW7V07tV93JW6Z3e7nfKlNEQKFYnRNQhq2A7fDGmw6VKiWOlu2H5RdVoTcEcQ6ppwf UHbw== X-Gm-Message-State: AHQUAuZI5X3Ps3LrxOlAMgDqeg568axt0hLsK9CeN9XmnpLohIRWsww8 hHrxR7na+BLBcPp8m0WnvgAJR7PIfd4= X-Google-Smtp-Source: AHgI3IYmjzq+CWBwWIwh6YP1fslT+MjAS/7PQhhe6Sn36+I40Bwq0IiDVZgM70qW0NPNN3xi6PguOA== X-Received: by 2002:a17:902:e287:: with SMTP id cf7mr1196494plb.51.1550073328159; Wed, 13 Feb 2019 07:55:28 -0800 (PST) Received: from localhost ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id f6sm27517477pfc.88.2019.02.13.07.55.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 13 Feb 2019 07:55:27 -0800 (PST) Date: Wed, 13 Feb 2019 07:54:11 -0800 Message-Id: <20190213155414.22285-33-palmer@sifive.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20190213155414.22285-1-palmer@sifive.com> References: <20190213155414.22285-1-palmer@sifive.com> From: Palmer Dabbelt To: qemu-riscv@nongnu.org X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 Subject: [Qemu-devel] [PATCH v7 32/35] target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bastian Koppelmann , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Bastian Koppelmann Reviewed-by: Richard Henderson Signed-off-by: Bastian Koppelmann --- target/riscv/insn16.decode | 20 ++++++++++---------- target/riscv/insn32.decode | 3 ++- target/riscv/insn_trans/trans_rvc.inc.c | 24 ------------------------ 3 files changed, 12 insertions(+), 35 deletions(-) diff --git a/target/riscv/insn16.decode b/target/riscv/insn16.decode index c7a58d80e5ae..c215867ff947 100644 --- a/target/riscv/insn16.decode +++ b/target/riscv/insn16.decode @@ -43,14 +43,14 @@ # Argument sets imported from insn32.decode: &r rd rs1 rs2 !extern +&i imm rs1 rd !extern +&s imm rs1 rs2 !extern # Argument sets: &cl rs1 rd -&cl_dw uimm rs1 rd &ci imm rd &ciw nzuimm rd &cs rs1 rs2 -&cs_dw uimm rs1 rs2 &cb imm rs1 &cr rd rs2 &c_j imm @@ -67,13 +67,13 @@ @cr .... ..... ..... .. &cr rs2=%rs2_5 %rd @ci ... . ..... ..... .. &ci imm=%imm_ci %rd @ciw ... ........ ... .. &ciw nzuimm=%nzuimm_ciw rd=%rs2_3 -@cl_d ... ... ... .. ... .. &cl_dw uimm=%uimm_cl_d rs1=%rs1_3 rd=%rs2_3 -@cl_w ... ... ... .. ... .. &cl_dw uimm=%uimm_cl_w rs1=%rs1_3 rd=%rs2_3 +@cl_d ... ... ... .. ... .. &i imm=%uimm_cl_d rs1=%rs1_3 rd=%rs2_3 +@cl_w ... ... ... .. ... .. &i imm=%uimm_cl_w rs1=%rs1_3 rd=%rs2_3 @cl ... ... ... .. ... .. &cl rs1=%rs1_3 rd=%rs2_3 @cs ... ... ... .. ... .. &cs rs1=%rs1_3 rs2=%rs2_3 @cs_2 ... ... ... .. ... .. &r rd=%rs1_3 rs1=%rs1_3 rs2=%rs2_3 -@cs_d ... ... ... .. ... .. &cs_dw uimm=%uimm_cl_d rs1=%rs1_3 rs2=%rs2_3 -@cs_w ... ... ... .. ... .. &cs_dw uimm=%uimm_cl_w rs1=%rs1_3 rs2=%rs2_3 +@cs_d ... ... ... .. ... .. &s imm=%uimm_cl_d rs1=%rs1_3 rs2=%rs2_3 +@cs_w ... ... ... .. ... .. &s imm=%uimm_cl_w rs1=%rs1_3 rs2=%rs2_3 @cb ... ... ... .. ... .. &cb imm=%imm_cb rs1=%rs1_3 @cj ... ........... .. &c_j imm=%imm_cj @@ -95,11 +95,11 @@ # *** RV64C Standard Extension (Quadrant 0) *** c_addi4spn 000 ........ ... 00 @ciw -c_fld 001 ... ... .. ... 00 @cl_d -c_lw 010 ... ... .. ... 00 @cl_w +fld 001 ... ... .. ... 00 @cl_d +lw 010 ... ... .. ... 00 @cl_w c_flw_ld 011 --- ... -- ... 00 @cl #Note: Must parse uimm manually -c_fsd 101 ... ... .. ... 00 @cs_d -c_sw 110 ... ... .. ... 00 @cs_w +fsd 101 ... ... .. ... 00 @cs_d +sw 110 ... ... .. ... 00 @cs_w c_fsw_sd 111 --- ... -- ... 00 @cs #Note: Must parse uimm manually # *** RV64C Standard Extension (Quadrant 1) *** diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 6f3ab7aa52d3..b59a00cc429f 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -37,6 +37,7 @@ &b imm rs2 rs1 &i imm rs1 rd &r rd rs1 rs2 +&s imm rs2 rs1 &shift shamt rs1 rd &atomic aq rl rs2 rs1 rd @@ -44,7 +45,7 @@ @r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd @i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd @b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 -@s ....... ..... ..... ... ..... ....... imm=%imm_s %rs2 %rs1 +@s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1 @u .................... ..... ....... imm=%imm_u %rd @j .................... ..... ....... imm=%imm_j %rd diff --git a/target/riscv/insn_trans/trans_rvc.inc.c b/target/riscv/insn_trans/trans_rvc.inc.c index 639c381edfc0..d932bfd3e0cc 100644 --- a/target/riscv/insn_trans/trans_rvc.inc.c +++ b/target/riscv/insn_trans/trans_rvc.inc.c @@ -28,18 +28,6 @@ static bool trans_c_addi4spn(DisasContext *ctx, arg_c_addi4spn *a) return trans_addi(ctx, &arg); } -static bool trans_c_fld(DisasContext *ctx, arg_c_fld *a) -{ - arg_fld arg = { .rd = a->rd, .rs1 = a->rs1, .imm = a->uimm }; - return trans_fld(ctx, &arg); -} - -static bool trans_c_lw(DisasContext *ctx, arg_c_lw *a) -{ - arg_lw arg = { .rd = a->rd, .rs1 = a->rs1, .imm = a->uimm }; - return trans_lw(ctx, &arg); -} - static bool trans_c_flw_ld(DisasContext *ctx, arg_c_flw_ld *a) { #ifdef TARGET_RISCV32 @@ -51,18 +39,6 @@ static bool trans_c_flw_ld(DisasContext *ctx, arg_c_flw_ld *a) #endif } -static bool trans_c_fsd(DisasContext *ctx, arg_c_fsd *a) -{ - arg_fsd arg = { .rs1 = a->rs1, .rs2 = a->rs2, .imm = a->uimm }; - return trans_fsd(ctx, &arg); -} - -static bool trans_c_sw(DisasContext *ctx, arg_c_sw *a) -{ - arg_sw arg = { .rs1 = a->rs1, .rs2 = a->rs2, .imm = a->uimm }; - return trans_sw(ctx, &arg); -} - static bool trans_c_fsw_sd(DisasContext *ctx, arg_c_fsw_sd *a) { #ifdef TARGET_RISCV32