From patchwork Wed Feb 13 15:53:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 10810237 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B128C139A for ; Wed, 13 Feb 2019 15:59:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9C85E2D404 for ; Wed, 13 Feb 2019 15:59:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8F26C2D416; Wed, 13 Feb 2019 15:59:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 042992D404 for ; Wed, 13 Feb 2019 15:59:09 +0000 (UTC) Received: from localhost ([127.0.0.1]:59081 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gtwwH-0003VS-4Z for patchwork-qemu-devel@patchwork.kernel.org; Wed, 13 Feb 2019 10:59:09 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59186) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gtwsL-0000yi-9j for qemu-devel@nongnu.org; Wed, 13 Feb 2019 10:55:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gtwsJ-0001GB-0s for qemu-devel@nongnu.org; Wed, 13 Feb 2019 10:55:04 -0500 Received: from mail-pf1-x429.google.com ([2607:f8b0:4864:20::429]:39794) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gtwsF-0000sp-Gk for qemu-devel@nongnu.org; Wed, 13 Feb 2019 10:55:00 -0500 Received: by mail-pf1-x429.google.com with SMTP id f132so1323486pfa.6 for ; Wed, 13 Feb 2019 07:54:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=subject:date:message-id:in-reply-to:references:cc:from:to; bh=uV02D/ZGg/STxrMcsigAemtft8KTXa1eNmoV5nUcMpg=; b=F+7PL1rXr3AWUd7+UUYAHt++Lcb76RHfmHoMlRq8ENy6e05LJihswJZsjAfxmaphu8 k+KYxkc+7XkNCR1aK4Khu8D4hDOSGdxg9ygP1zjUqB8/ckjZqqYY5lS65gaKNcqXo+1k +2r+ugzLYToXBO3LDsjvvELMPsQO6UNmB3jwzaBH/zJfdfl+y6CwW5Exhy+MnDw/CJVK 5dZOIQN9+4irbo19Tzkz++AzgpaAKEJdh5TPSp0BNmo4wgEasl6OmKt9FodTj1qGbRBM LTpeM2P8EXQ8929ngfN6tv+Jdebx7KiQToz5hTVT9GNE1FbWvnSWXM+BT2X7Qiyv/uV9 KmPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:date:message-id:in-reply-to:references :cc:from:to; bh=uV02D/ZGg/STxrMcsigAemtft8KTXa1eNmoV5nUcMpg=; b=IGqcY8P7B/OoUzProjURAflntBzaxoLwAgfHrmgXVthpUFwP7XqGO1DzyAc6XiSrGq Jx9KNcO/nXUZ/hawFPJboegqlKTTeTs0pfKd5gTilDZoT87RiTnwXPeIqZk6Omxpnf2v mUtKrdEwpyB+Jawq4eSdM7UYPSX/t21/V2E3QUP4ORewwXnxOZbQMxawV86BGg4rMoAs tZVkxpqRbTsI87x6A62c+LhOdyhGo0R8EZVRBtmFXYyEqE5Wc40emcegnDKRj8oL8yTf 6d4QdvBEMMF/Ji8WmIeVkoRpR7Yfdf/t4y+pr/sH/lHlzxKOCUXr7vUlD+iZGSMwqj2f 3/pQ== X-Gm-Message-State: AHQUAua7Y1rBr5yu5GVQVW3+nilW8xc6m2hBQKG4F09EHunwhUeCTcDU ZpsW5FipyzTOhFCH3G0Wn1xaE9a/2Ec= X-Google-Smtp-Source: AHgI3IZn8EfGIBIvKQMjTnJdeqpQ/vkOmkRVxSighgkw7nnMAkNkkEJKEZR+u6Pj7YtSiYjcwpMYXw== X-Received: by 2002:a63:535c:: with SMTP id t28mr1096866pgl.128.1550073281600; Wed, 13 Feb 2019 07:54:41 -0800 (PST) Received: from localhost ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id y14sm26486840pgc.17.2019.02.13.07.54.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 13 Feb 2019 07:54:40 -0800 (PST) Date: Wed, 13 Feb 2019 07:53:42 -0800 Message-Id: <20190213155414.22285-4-palmer@sifive.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20190213155414.22285-1-palmer@sifive.com> References: <20190213155414.22285-1-palmer@sifive.com> From: Palmer Dabbelt To: qemu-riscv@nongnu.org X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::429 Subject: [Qemu-devel] [PATCH v7 03/35] target/riscv: Convert RVXI branch insns to decodetree X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bastian Koppelmann , Peer Adelt , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Bastian Koppelmann Acked-by: Alistair Francis Reviewed-by: Palmer Dabbelt Reviewed-by: Richard Henderson Signed-off-by: Bastian Koppelmann Signed-off-by: Peer Adelt --- target/riscv/insn32.decode | 19 ++++++++++ target/riscv/insn_trans/trans_rvi.inc.c | 49 +++++++++++++++++++++++++ target/riscv/translate.c | 12 +----- 3 files changed, 69 insertions(+), 11 deletions(-) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 44d4e922b6fa..81f56c16b45f 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -17,14 +17,33 @@ # this program. If not, see . # Fields: +%rs2 20:5 +%rs1 15:5 %rd 7:5 # immediates: +%imm_i 20:s12 +%imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1 +%imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1 %imm_u 12:s20 !function=ex_shift_12 +# Argument sets: +&b imm rs2 rs1 + # Formats 32: +@i ............ ..... ... ..... ....... imm=%imm_i %rs1 %rd +@b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 @u .................... ..... ....... imm=%imm_u %rd +@j .................... ..... ....... imm=%imm_j %rd # *** RV32I Base Instruction Set *** lui .................... ..... 0110111 @u auipc .................... ..... 0010111 @u +jal .................... ..... 1101111 @j +jalr ............ ..... 000 ..... 1100111 @i +beq ....... ..... ..... 000 ..... 1100011 @b +bne ....... ..... ..... 001 ..... 1100011 @b +blt ....... ..... ..... 100 ..... 1100011 @b +bge ....... ..... ..... 101 ..... 1100011 @b +bltu ....... ..... ..... 110 ..... 1100011 @b +bgeu ....... ..... ..... 111 ..... 1100011 @b diff --git a/target/riscv/insn_trans/trans_rvi.inc.c b/target/riscv/insn_trans/trans_rvi.inc.c index 9885a8d27551..bcf20def50eb 100644 --- a/target/riscv/insn_trans/trans_rvi.inc.c +++ b/target/riscv/insn_trans/trans_rvi.inc.c @@ -33,3 +33,52 @@ static bool trans_auipc(DisasContext *ctx, arg_auipc *a) } return true; } + +static bool trans_jal(DisasContext *ctx, arg_jal *a) +{ + gen_jal(ctx, a->rd, a->imm); + return true; +} + +static bool trans_jalr(DisasContext *ctx, arg_jalr *a) +{ + gen_jalr(ctx, OPC_RISC_JALR, a->rd, a->rs1, a->imm); + return true; +} + +static bool trans_beq(DisasContext *ctx, arg_beq *a) +{ + gen_branch(ctx, OPC_RISC_BEQ, a->rs1, a->rs2, a->imm); + return true; +} + +static bool trans_bne(DisasContext *ctx, arg_bne *a) +{ + gen_branch(ctx, OPC_RISC_BNE, a->rs1, a->rs2, a->imm); + return true; +} + +static bool trans_blt(DisasContext *ctx, arg_blt *a) +{ + gen_branch(ctx, OPC_RISC_BLT, a->rs1, a->rs2, a->imm); + return true; +} + +static bool trans_bge(DisasContext *ctx, arg_bge *a) +{ + gen_branch(ctx, OPC_RISC_BGE, a->rs1, a->rs2, a->imm); + return true; +} + +static bool trans_bltu(DisasContext *ctx, arg_bltu *a) +{ + gen_branch(ctx, OPC_RISC_BLTU, a->rs1, a->rs2, a->imm); + return true; +} + +static bool trans_bgeu(DisasContext *ctx, arg_bgeu *a) +{ + + gen_branch(ctx, OPC_RISC_BGEU, a->rs1, a->rs2, a->imm); + return true; +} diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 4076f28b3c8b..c5bcfd6b9756 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1880,6 +1880,7 @@ static void decode_RV32_64C(DisasContext *ctx) { \ return imm << amount; \ } +EX_SH(1) EX_SH(12) bool decode_insn32(DisasContext *ctx, uint32_t insn); @@ -1908,17 +1909,6 @@ static void decode_RV32_64G(DisasContext *ctx) imm = GET_IMM(ctx->opcode); switch (op) { - case OPC_RISC_JAL: - imm = GET_JAL_IMM(ctx->opcode); - gen_jal(ctx, rd, imm); - break; - case OPC_RISC_JALR: - gen_jalr(ctx, MASK_OP_JALR(ctx->opcode), rd, rs1, imm); - break; - case OPC_RISC_BRANCH: - gen_branch(ctx, MASK_OP_BRANCH(ctx->opcode), rs1, rs2, - GET_B_IMM(ctx->opcode)); - break; case OPC_RISC_LOAD: gen_load(ctx, MASK_OP_LOAD(ctx->opcode), rd, rs1, imm); break;