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Cota" To: qemu-devel@nongnu.org Date: Mon, 4 Mar 2019 13:17:46 -0500 Message-Id: <20190304181813.8075-47-cota@braap.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190304181813.8075-1-cota@braap.org> References: <20190304181813.8075-1-cota@braap.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 64.147.123.25 Subject: [Qemu-devel] [PATCH v7 46/73] cris: convert to cpu_interrupt_request X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Richard Henderson , "Edgar E. Iglesias" Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Cc: "Edgar E. Iglesias" Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Emilio G. Cota --- target/cris/cpu.c | 2 +- target/cris/helper.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target/cris/cpu.c b/target/cris/cpu.c index a23aba2688..3cdba581e6 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -37,7 +37,7 @@ static void cris_cpu_set_pc(CPUState *cs, vaddr value) static bool cris_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); + return cpu_interrupt_request(cs) & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); } /* CPUClass::reset() */ diff --git a/target/cris/helper.c b/target/cris/helper.c index b2dbb2075c..5c453d5221 100644 --- a/target/cris/helper.c +++ b/target/cris/helper.c @@ -116,7 +116,7 @@ int cris_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, if (r > 0) { qemu_log_mask(CPU_LOG_MMU, "%s returns %d irqreq=%x addr=%" VADDR_PRIx " phy=%x vec=%x" - " pc=%x\n", __func__, r, cs->interrupt_request, address, + " pc=%x\n", __func__, r, cpu_interrupt_request(cs), address, res.phy, res.bf_vec, env->pc); } return r; @@ -130,7 +130,7 @@ void crisv10_cpu_do_interrupt(CPUState *cs) D_LOG("exception index=%d interrupt_req=%d\n", cs->exception_index, - cs->interrupt_request); + cpu_interrupt_request(cs)); if (env->dslot) { /* CRISv10 never takes interrupts while in a delay-slot. */ @@ -192,7 +192,7 @@ void cris_cpu_do_interrupt(CPUState *cs) D_LOG("exception index=%d interrupt_req=%d\n", cs->exception_index, - cs->interrupt_request); + cpu_interrupt_request(cs)); switch (cs->exception_index) { case EXCP_BREAK: