From patchwork Thu Mar 7 07:21:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elena Ufimtseva X-Patchwork-Id: 10842315 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 18E4A14E1 for ; Thu, 7 Mar 2019 07:42:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 03AAB2E8D3 for ; Thu, 7 Mar 2019 07:42:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 019FF2E99D; Thu, 7 Mar 2019 07:42:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 451652E8F0 for ; Thu, 7 Mar 2019 07:42:07 +0000 (UTC) Received: from localhost ([127.0.0.1]:46848 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h1nfK-00024K-Bg for patchwork-qemu-devel@patchwork.kernel.org; Thu, 07 Mar 2019 02:42:06 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59827) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h1nLv-0002AJ-6k for qemu-devel@nongnu.org; Thu, 07 Mar 2019 02:22:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h1nLt-0005Am-RE for qemu-devel@nongnu.org; Thu, 07 Mar 2019 02:22:03 -0500 Received: from userp2130.oracle.com ([156.151.31.86]:48220) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h1nLt-0005A8-HU for qemu-devel@nongnu.org; Thu, 07 Mar 2019 02:22:01 -0500 Received: from pps.filterd (userp2130.oracle.com [127.0.0.1]) by userp2130.oracle.com (8.16.0.27/8.16.0.27) with SMTP id x277JQ6o037995; Thu, 7 Mar 2019 07:21:57 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id; s=corp-2018-07-02; bh=4ILLhrJq3Tp8/p2ijA0GSBnATptAFdDZ7udOQIwagLc=; b=Z6XcwI7rClG9GO/2YeSZQTR6HZstISCjSvwgCunFNq8Y8vleCfcNealFJOxRi5MHn5NI VsB8TGMrtzJ97yK6nq7erFmtfAypt5xzfKUnEzS7hl9tZJSB8Lgh1nNAQHJ2nGdFi0Pd V9feoFMOD1bZaRtEgzjRNqcbqVr9FYpKXtdwetK4Dd29ES2LV/dw++/3soRGVRkw/khn 3RJI4HJ6KQn/Yn+630/76xN2R/rMfM7RGqsZi7v8nnVg759OQk0V69OPwPflNvo+BNqD 4eVJaHpaft4sqBNf3ubHYkmu1u2V1BGlk7OOwCp5Tx86Ue9i91aQH9eXp7p8naaaWPjr qA== Received: from aserv0022.oracle.com (aserv0022.oracle.com [141.146.126.234]) by userp2130.oracle.com with ESMTP id 2qyh8ug95u-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 07 Mar 2019 07:21:57 +0000 Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by aserv0022.oracle.com (8.14.4/8.14.4) with ESMTP id x277LtKu031365 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 7 Mar 2019 07:21:56 GMT Received: from abhmp0017.oracle.com (abhmp0017.oracle.com [141.146.116.23]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id x277Ltv4011458; Thu, 7 Mar 2019 07:21:55 GMT Received: from heatpipe.hsd1.ca.comcast.net (/73.170.27.202) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Wed, 06 Mar 2019 23:21:55 -0800 From: elena.ufimtseva@oracle.com To: qemu-devel@nongnu.org Date: Wed, 6 Mar 2019 23:21:50 -0800 Message-Id: <20190307072151.8830-1-elena.ufimtseva@oracle.com> X-Mailer: git-send-email 2.17.1 X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=9187 signatures=668685 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903070053 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 156.151.31.86 Subject: [Qemu-devel] [multiprocess RFC PATCH 16/37] multi-process: Add LSI device proxy object X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: elena.ufimtseva@oracle.com, john.g.johnson@oracle.com, sstabellini@kernel.org, jag.raman@oracle.com, konrad.wilk@oracle.com, ross.lagerwall@citrix.com, liran.alon@oracle.com, stefanha@redhat.com, kanth.ghatraju@oracle.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Jagannathan Raman Adds proxy-lsi53c895a object, as a derivative of the pci-proxy-dev object. This object is the proxy for the lsi53c895a object instantiated by the remote process. Signed-off-by: John G Johnson Signed-off-by: Jagannathan Raman Signed-off-by: Elena Ufimtseva --- hw/proxy/Makefile.objs | 1 + hw/proxy/proxy-lsi53c895a.c | 162 ++++++++++++++++++++++++++++++++++++ include/hw/proxy/proxy-lsi53c895a.h | 42 ++++++++++ 3 files changed, 205 insertions(+) create mode 100644 hw/proxy/proxy-lsi53c895a.c create mode 100644 include/hw/proxy/proxy-lsi53c895a.h diff --git a/hw/proxy/Makefile.objs b/hw/proxy/Makefile.objs index eb81624..f562f5a 100644 --- a/hw/proxy/Makefile.objs +++ b/hw/proxy/Makefile.objs @@ -1 +1,2 @@ common-obj-$(CONFIG_MPQEMU) += qemu-proxy.o +common-obj-$(CONFIG_MPQEMU) += proxy-lsi53c895a.o diff --git a/hw/proxy/proxy-lsi53c895a.c b/hw/proxy/proxy-lsi53c895a.c new file mode 100644 index 0000000..9a9eb52 --- /dev/null +++ b/hw/proxy/proxy-lsi53c895a.c @@ -0,0 +1,162 @@ +/* + * Copyright 2019, Oracle and/or its affiliates. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "qemu/osdep.h" +#include "hw/qdev-core.h" +#include "qemu/bitops.h" +#include "hw/pci/pci.h" +#include "hw/proxy/qemu-proxy.h" +#include "hw/proxy/proxy-lsi53c895a.h" +#include "exec/memory.h" + +static uint64_t proxy_lsi_io_read(void *opaque, hwaddr addr, unsigned size) +{ + ProxyLSIState *s = opaque; + + return proxy_default_bar_read(PCI_PROXY_DEV(s), &s->io_io, addr, size, + false); +} + +static void proxy_lsi_io_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + ProxyLSIState *s = opaque; + + proxy_default_bar_write(PCI_PROXY_DEV(s), &s->io_io, addr, val, size, + false); +} + +static const MemoryRegionOps proxy_lsi_io_ops = { + .read = proxy_lsi_io_read, + .write = proxy_lsi_io_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, +}; + +static uint64_t proxy_lsi_ram_read(void *opaque, hwaddr addr, unsigned size) +{ + ProxyLSIState *s = opaque; + + return proxy_default_bar_read(PCI_PROXY_DEV(s), &s->ram_io, addr, size, + true); +} + +static void proxy_lsi_ram_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + ProxyLSIState *s = opaque; + + proxy_default_bar_write(PCI_PROXY_DEV(s), &s->ram_io, addr, val, size, + true); +} + +static const MemoryRegionOps proxy_lsi_ram_ops = { + .read = proxy_lsi_ram_read, + .write = proxy_lsi_ram_write, + .endianness = DEVICE_NATIVE_ENDIAN, +}; + +static uint64_t proxy_lsi_mmio_read(void *opaque, hwaddr addr, unsigned size) +{ + ProxyLSIState *s = opaque; + + return proxy_default_bar_read(PCI_PROXY_DEV(s), &s->mmio_io, addr, size, + true); +} + +static void proxy_lsi_mmio_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + ProxyLSIState *s = opaque; + + proxy_default_bar_write(PCI_PROXY_DEV(s), &s->mmio_io, addr, val, size, + true); +} + +static const MemoryRegionOps proxy_lsi_mmio_ops = { + .read = proxy_lsi_mmio_read, + .write = proxy_lsi_mmio_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, +}; + +static void proxy_lsi_realize(PCIProxyDev *dev, Error **errp) +{ + ProxyLSIState *s = LSI_PROXY_DEV(dev); + PCIDevice *pci_dev = PCI_DEVICE(dev); + uint8_t *pci_conf = pci_dev->config; + + pci_conf[PCI_LATENCY_TIMER] = 0xff; + pci_conf[PCI_INTERRUPT_PIN] = 0x01; + + memory_region_init_io(&s->mmio_io, OBJECT(s), &proxy_lsi_mmio_ops, s, + "proxy-lsi-mmio", 0x400); + memory_region_init_io(&s->ram_io, OBJECT(s), &proxy_lsi_ram_ops, s, + "proxy-lsi-ram", 0x2000); + memory_region_init_io(&s->io_io, OBJECT(s), &proxy_lsi_io_ops, s, + "proxy-lsi-io", 256); + + pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_io); + pci_register_bar(pci_dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio_io); + pci_register_bar(pci_dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->ram_io); +} + +static void proxy_lsi_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *pci_class = PCI_DEVICE_CLASS(klass); + PCIProxyDevClass *proxy_class = PCI_PROXY_DEV_CLASS(klass); + + proxy_class->realize = proxy_lsi_realize; + proxy_class->command = g_strdup("qemu-scsi-dev"); + + pci_class->vendor_id = PCI_VENDOR_ID_LSI_LOGIC; + pci_class->device_id = PCI_DEVICE_ID_LSI_53C895A; + pci_class->class_id = PCI_CLASS_STORAGE_SCSI; + pci_class->subsystem_id = 0x1000; + + set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); + + dc->desc = "LSI Proxy Device"; +} + +static const TypeInfo lsi_proxy_dev_type_info = { + .name = TYPE_PROXY_LSI53C895A, + .parent = TYPE_PCI_PROXY_DEV, + .instance_size = sizeof(ProxyLSIState), + .class_init = proxy_lsi_class_init, +}; + +static void lsi_proxy_dev_register_types(void) +{ + type_register_static(&lsi_proxy_dev_type_info); +} + +type_init(lsi_proxy_dev_register_types) diff --git a/include/hw/proxy/proxy-lsi53c895a.h b/include/hw/proxy/proxy-lsi53c895a.h new file mode 100644 index 0000000..6368a4e --- /dev/null +++ b/include/hw/proxy/proxy-lsi53c895a.h @@ -0,0 +1,42 @@ +/* + * Copyright 2019, Oracle and/or its affiliates. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef LSI_PROXY_H +#define LSI_PROXY_H + +#include "hw/proxy/qemu-proxy.h" + +#define TYPE_PROXY_LSI53C895A "proxy-lsi53c895a" + +#define LSI_PROXY_DEV(obj) \ + OBJECT_CHECK(ProxyLSIState, (obj), TYPE_PROXY_LSI53C895A) + +typedef struct ProxyLSIState { + PCIProxyDev parent_dev; + + MemoryRegion mmio_io; + MemoryRegion ram_io; + MemoryRegion io_io; + +} ProxyLSIState; + +#endif