From patchwork Tue Mar 12 08:52:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 10848975 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 627661850 for ; Tue, 12 Mar 2019 09:54:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 46FF02859E for ; Tue, 12 Mar 2019 09:54:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3913129345; Tue, 12 Mar 2019 09:54:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C8EE92859E for ; Tue, 12 Mar 2019 09:54:29 +0000 (UTC) Received: from localhost ([127.0.0.1]:48532 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h3e7B-0002v7-1a for patchwork-qemu-devel@patchwork.kernel.org; Tue, 12 Mar 2019 05:54:29 -0400 Received: from eggs.gnu.org ([209.51.188.92]:52436) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h3dU2-0007dG-Qs for qemu-devel@nongnu.org; Tue, 12 Mar 2019 05:14:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h3dHc-0006Kf-UE for qemu-devel@nongnu.org; Tue, 12 Mar 2019 05:01:14 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52450) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h3dHc-0006K9-MV; Tue, 12 Mar 2019 05:01:12 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id EF7593082A51; Tue, 12 Mar 2019 08:54:48 +0000 (UTC) Received: from umbus.redhat.com (vpn2-54-33.bne.redhat.com [10.64.54.33]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8DAA16013E; Tue, 12 Mar 2019 08:54:43 +0000 (UTC) From: David Gibson To: peter.maydell@linaro.org Date: Tue, 12 Mar 2019 19:52:37 +1100 Message-Id: <20190312085316.8054-24-dgibson@redhat.com> In-Reply-To: <20190312085316.8054-1-dgibson@redhat.com> References: <20190312085316.8054-1-dgibson@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Tue, 12 Mar 2019 08:54:49 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 23/62] ppc/xive: export the TIMA memory accessors X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, clg@kaod.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, groug@kaod.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Cédric Le Goater The PowerNV machine can perform indirect loads and stores on the TIMA on behalf of another CPU. Give the controller the possibility to call the TIMA memory accessors with a XiveTCTX of its choice. Signed-off-by: Cédric Le Goater Message-Id: <20190306085032.15744-4-clg@kaod.org> Signed-off-by: David Gibson --- hw/intc/xive.c | 23 ++++++++++++++++++----- include/hw/ppc/xive.h | 3 +++ 2 files changed, 21 insertions(+), 5 deletions(-) diff --git a/hw/intc/xive.c b/hw/intc/xive.c index b21759c938..3d7de864e9 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -317,10 +317,9 @@ static const XiveTmOp *xive_tm_find_op(hwaddr offset, unsigned size, bool write) /* * TIMA MMIO handlers */ -static void xive_tm_write(void *opaque, hwaddr offset, - uint64_t value, unsigned size) +void xive_tctx_tm_write(XiveTCTX *tctx, hwaddr offset, uint64_t value, + unsigned size) { - XiveTCTX *tctx = xive_router_get_tctx(XIVE_ROUTER(opaque), current_cpu); const XiveTmOp *xto; /* @@ -356,9 +355,8 @@ static void xive_tm_write(void *opaque, hwaddr offset, xive_tm_raw_write(tctx, offset, value, size); } -static uint64_t xive_tm_read(void *opaque, hwaddr offset, unsigned size) +uint64_t xive_tctx_tm_read(XiveTCTX *tctx, hwaddr offset, unsigned size) { - XiveTCTX *tctx = xive_router_get_tctx(XIVE_ROUTER(opaque), current_cpu); const XiveTmOp *xto; /* @@ -392,6 +390,21 @@ static uint64_t xive_tm_read(void *opaque, hwaddr offset, unsigned size) return xive_tm_raw_read(tctx, offset, size); } +static void xive_tm_write(void *opaque, hwaddr offset, + uint64_t value, unsigned size) +{ + XiveTCTX *tctx = xive_router_get_tctx(XIVE_ROUTER(opaque), current_cpu); + + xive_tctx_tm_write(tctx, offset, value, size); +} + +static uint64_t xive_tm_read(void *opaque, hwaddr offset, unsigned size) +{ + XiveTCTX *tctx = xive_router_get_tctx(XIVE_ROUTER(opaque), current_cpu); + + return xive_tctx_tm_read(tctx, offset, size); +} + const MemoryRegionOps xive_tm_ops = { .read = xive_tm_read, .write = xive_tm_write, diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index 13a487527b..7dd80e0f46 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -410,6 +410,9 @@ void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, Monitor *mon); #define XIVE_TM_USER_PAGE 0x3 extern const MemoryRegionOps xive_tm_ops; +void xive_tctx_tm_write(XiveTCTX *tctx, hwaddr offset, uint64_t value, + unsigned size); +uint64_t xive_tctx_tm_read(XiveTCTX *tctx, hwaddr offset, unsigned size); void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon); Object *xive_tctx_create(Object *cpu, XiveRouter *xrtr, Error **errp);