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[220.132.236.182]) by smtp.gmail.com with ESMTPSA id q3sm2364742pgv.21.2019.06.27.08.24.38 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 27 Jun 2019 08:24:39 -0700 (PDT) Date: Thu, 27 Jun 2019 08:20:08 -0700 Message-Id: <20190627152011.18686-32-palmer@sifive.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190627152011.18686-1-palmer@sifive.com> References: <20190627152011.18686-1-palmer@sifive.com> MIME-Version: 1.0 From: Palmer Dabbelt To: Peter Maydell X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.215.194 Subject: [Qemu-devel] [PULL 31/34] hw/riscv: Add support for loading a firmware X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Bin Meng , qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Palmer Dabbelt Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Alistair Francis Add support for loading a firmware file for the virt machine and the SiFive U. This can be run with the following command: qemu-system-riscv64 -machine virt -bios fw_jump.bin -kernel vmlinux Signed-off-by: Alistair Francis Reviewed-by: Bin Meng Tested-by: Bin Meng Signed-off-by: Palmer Dabbelt --- hw/riscv/boot.c | 26 ++++++++++++++++++++++++++ hw/riscv/sifive_u.c | 4 ++++ hw/riscv/virt.c | 4 ++++ include/hw/riscv/boot.h | 2 ++ 4 files changed, 36 insertions(+) diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 0c8e72e455d7..883df49a0c65 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -23,8 +23,34 @@ #include "exec/cpu-defs.h" #include "hw/loader.h" #include "hw/riscv/boot.h" +#include "hw/boards.h" #include "elf.h" +#if defined(TARGET_RISCV32) +# define KERNEL_BOOT_ADDRESS 0x80400000 +#else +# define KERNEL_BOOT_ADDRESS 0x80200000 +#endif + +target_ulong riscv_load_firmware(const char *firmware_filename, + hwaddr firmware_load_addr) +{ + uint64_t firmware_entry, firmware_start, firmware_end; + + if (load_elf(firmware_filename, NULL, NULL, NULL, &firmware_entry, + &firmware_start, &firmware_end, 0, EM_RISCV, 1, 0) > 0) { + return firmware_entry; + } + + if (load_image_targphys_as(firmware_filename, firmware_load_addr, + ram_size, NULL) > 0) { + return firmware_load_addr; + } + + error_report("could not load firmware '%s'", firmware_filename); + exit(1); +} + target_ulong riscv_load_kernel(const char *kernel_filename) { uint64_t kernel_entry, kernel_high; diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index f6b9c12e6094..420867155293 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -269,6 +269,10 @@ static void riscv_sifive_u_init(MachineState *machine) /* create device tree */ create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline); + if (machine->firmware) { + riscv_load_firmware(machine->firmware, memmap[SIFIVE_U_DRAM].base); + } + if (machine->kernel_filename) { riscv_load_kernel(machine->kernel_filename); } diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 485aefa99523..d8181a4ff18a 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -398,6 +398,10 @@ static void riscv_virt_board_init(MachineState *machine) memory_region_add_subregion(system_memory, memmap[VIRT_MROM].base, mask_rom); + if (machine->firmware) { + riscv_load_firmware(machine->firmware, memmap[VIRT_DRAM].base); + } + if (machine->kernel_filename) { uint64_t kernel_entry = riscv_load_kernel(machine->kernel_filename); diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index f84fd6c2df5e..daa179b600f4 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -20,6 +20,8 @@ #ifndef RISCV_BOOT_H #define RISCV_BOOT_H +target_ulong riscv_load_firmware(const char *firmware_filename, + hwaddr firmware_load_addr); target_ulong riscv_load_kernel(const char *kernel_filename); hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size, uint64_t kernel_entry, hwaddr *start);