| Message ID | 20190827045751.22123-1-sjitindarsingh@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [QEMU-PPC,V4] powerpc/spapr: Add host threads parameter to ibm, get_system_parameter | expand |
On Tue, Aug 27, 2019 at 02:57:51PM +1000, Suraj Jitindar Singh wrote: > The ibm,get_system_parameter rtas call is used by the guest to retrieve > data relating to certain parameters of the system. The SPLPAR > characteristics option (token 20) is used to determine characteristics of > the environment in which the lpar will run. > > It may be useful for a guest to know the number of physical host threads > present on the underlying system where it is being run. Add the > characteristic "HostThrs" to the SPLPAR Characteristics > ibm,get_system_parameter rtas call to expose this information to a > guest. Add a n_host_threads property to the processor class which is > then used to retrieve this information and define it for POWER8 and > POWER9. Other processors will default to 0 and the charateristic won't > be added. > > Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Applied, thanks. > > --- > > V1 -> V2: > - Take into account that the core may be operating in split core mode > meaning a single core may be split into multiple subcores. > V2 -> V3: > - Add curly braces for single line if statements > V3 -> V4; > - Add a host threads property to the processor class and use this to > derive the information rather than the device tree. > --- > hw/ppc/spapr_rtas.c | 15 +++++++++++++++ > target/ppc/cpu-qom.h | 1 + > target/ppc/translate_init.inc.c | 2 ++ > 3 files changed, 18 insertions(+) > > diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c > index 526b489297..bee3835214 100644 > --- a/hw/ppc/spapr_rtas.c > +++ b/hw/ppc/spapr_rtas.c > @@ -266,6 +266,7 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, > target_ulong args, > uint32_t nret, target_ulong rets) > { > + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); > MachineState *ms = MACHINE(qdev_get_machine()); > unsigned int max_cpus = ms->smp.max_cpus; > target_ulong parameter = rtas_ld(args, 0); > @@ -283,6 +284,20 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, > current_machine->ram_size / MiB, > ms->smp.cpus, > max_cpus); > + if (pcc->n_host_threads > 0) { > + char *hostthr_val, *old = param_val; > + > + /* > + * Add HostThrs property. This property is not present in PAPR but > + * is expected by some guests to communicate the number of physical > + * host threads per core on the system so that they can scale > + * information which varies based on the thread configuration. > + */ > + hostthr_val = g_strdup_printf(",HostThrs=%d", pcc->n_host_threads); > + param_val = g_strconcat(param_val, hostthr_val, NULL); > + g_free(hostthr_val); > + g_free(old); > + } > ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1); > g_free(param_val); > break; > diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h > index 7ffdb0a706..e499575dc8 100644 > --- a/target/ppc/cpu-qom.h > +++ b/target/ppc/cpu-qom.h > @@ -191,6 +191,7 @@ typedef struct PowerPCCPUClass { > const PPCHash64Options *hash64_opts; > struct ppc_radix_page_info *radix_page_info; > uint32_t lrg_decr_bits; > + int n_host_threads; > void (*init_proc)(CPUPPCState *env); > int (*check_pow)(CPUPPCState *env); > int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx); > diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c > index 4a21ed7289..41f77b7ef8 100644 > --- a/target/ppc/translate_init.inc.c > +++ b/target/ppc/translate_init.inc.c > @@ -8770,6 +8770,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) > pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->lrg_decr_bits = 32; > + pcc->n_host_threads = 8; > #endif > pcc->excp_model = POWERPC_EXCP_POWER8; > pcc->bus_model = PPC_FLAGS_INPUT_POWER7; > @@ -8981,6 +8982,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->radix_page_info = &POWER9_radix_page_info; > pcc->lrg_decr_bits = 56; > + pcc->n_host_threads = 4; > #endif > pcc->excp_model = POWERPC_EXCP_POWER9; > pcc->bus_model = PPC_FLAGS_INPUT_POWER9;
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 526b489297..bee3835214 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -266,6 +266,7 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, target_ulong args, uint32_t nret, target_ulong rets) { + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); MachineState *ms = MACHINE(qdev_get_machine()); unsigned int max_cpus = ms->smp.max_cpus; target_ulong parameter = rtas_ld(args, 0); @@ -283,6 +284,20 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, current_machine->ram_size / MiB, ms->smp.cpus, max_cpus); + if (pcc->n_host_threads > 0) { + char *hostthr_val, *old = param_val; + + /* + * Add HostThrs property. This property is not present in PAPR but + * is expected by some guests to communicate the number of physical + * host threads per core on the system so that they can scale + * information which varies based on the thread configuration. + */ + hostthr_val = g_strdup_printf(",HostThrs=%d", pcc->n_host_threads); + param_val = g_strconcat(param_val, hostthr_val, NULL); + g_free(hostthr_val); + g_free(old); + } ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1); g_free(param_val); break; diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index 7ffdb0a706..e499575dc8 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -191,6 +191,7 @@ typedef struct PowerPCCPUClass { const PPCHash64Options *hash64_opts; struct ppc_radix_page_info *radix_page_info; uint32_t lrg_decr_bits; + int n_host_threads; void (*init_proc)(CPUPPCState *env); int (*check_pow)(CPUPPCState *env); int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx); diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index 4a21ed7289..41f77b7ef8 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -8770,6 +8770,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; pcc->hash64_opts = &ppc_hash64_opts_POWER7; pcc->lrg_decr_bits = 32; + pcc->n_host_threads = 8; #endif pcc->excp_model = POWERPC_EXCP_POWER8; pcc->bus_model = PPC_FLAGS_INPUT_POWER7; @@ -8981,6 +8982,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) pcc->hash64_opts = &ppc_hash64_opts_POWER7; pcc->radix_page_info = &POWER9_radix_page_info; pcc->lrg_decr_bits = 56; + pcc->n_host_threads = 4; #endif pcc->excp_model = POWERPC_EXCP_POWER9; pcc->bus_model = PPC_FLAGS_INPUT_POWER9;
The ibm,get_system_parameter rtas call is used by the guest to retrieve data relating to certain parameters of the system. The SPLPAR characteristics option (token 20) is used to determine characteristics of the environment in which the lpar will run. It may be useful for a guest to know the number of physical host threads present on the underlying system where it is being run. Add the characteristic "HostThrs" to the SPLPAR Characteristics ibm,get_system_parameter rtas call to expose this information to a guest. Add a n_host_threads property to the processor class which is then used to retrieve this information and define it for POWER8 and POWER9. Other processors will default to 0 and the charateristic won't be added. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> --- V1 -> V2: - Take into account that the core may be operating in split core mode meaning a single core may be split into multiple subcores. V2 -> V3: - Add curly braces for single line if statements V3 -> V4; - Add a host threads property to the processor class and use this to derive the information rather than the device tree. --- hw/ppc/spapr_rtas.c | 15 +++++++++++++++ target/ppc/cpu-qom.h | 1 + target/ppc/translate_init.inc.c | 2 ++ 3 files changed, 18 insertions(+)