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Thu, 19 Dec 2019 13:09:36 +0000 From: Klaus Jensen To: Subject: [PATCH v4 05/24] nvme: populate the mandatory subnqn and ver fields Date: Thu, 19 Dec 2019 14:09:02 +0100 Message-ID: <20191219130921.309264-6-k.jensen@samsung.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20191219130921.309264-1-k.jensen@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprGKsWRmVeSWpSXmKPExsWy7djPc7oTy37HGjz4bGqxub+d0WLSoWuM FksuplrMu6VsMetdO5vF8d4dLA5sHptWdbJ53Lm2h83jybXNTB7v911lC2CJ4rJJSc3JLEst 0rdL4MpY2/mYvWC1QMW76awNjD95uhg5OSQETCR6j+9j72Lk4hASWMEo8fDSZzYI5wujxNLp v1ghnM+MEqf2zGCDaVnz6jIjiC0ksJxRYvYzbbiirf//s0A4ZxglfqxsYoZwdjFKTD/yih2k hU1AU2L7H5AqTg4RAWmJ9quTwHYwC1xnlDj0+yJYkbCAj0Tb62XMIDaLgKrEtPNdQA0cHLwC VhLvDvhBnCEvsfXbJ1YQm1PAWmJL722wk3gFBCVOznwCNp8ZqKZ562xmCFtC4uCLF2AHSQis YpdYfKaTGWKQi0TTk+uMELawxKvjW9ghbBmJ05N7WCAauhkl+j58heqeAfTOsu9sIBdJAK3u O5MD0eAoMfnjaUaIMJ/EjbeCEIv5JCZtm84MEeaV6GgTgqhWk9jRtJVxAqPyLCRnz0Jy9iwk Zy9gZF7FKJ5aWpybnlpslJdarlecmFtcmpeul5yfu4kRmFpO/zv+ZQfjrj9JhxgFOBiVeHhf JP+OFWJNLCuuzD3EKMHBrCTCe7vjZ6wQb0piZVVqUX58UWlOavEhRmkOFiVxXuNFL2OFBNIT S1KzU1MLUotgskwcnFINjCw/9Vhnrz01axZTxPwzdzzlG04dOlc4NdL966NppvMXXvU8sinz YpQjC09G//z3hnMe3XAy2JN8wNxaMXBrj8FxkwVXQ8K5k2x1DRt7VyWr3Wfkf1GU/E7EtSB/ sdXia2q/J6ZPuvlfTGzpdW+JlyplWcV/t4rNMsv+2Bu8QcfRaL2y+ERpOyWW4oxEQy3mouJE AKKoM1opAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrMIsWRmVeSWpSXmKPExsVy+t/xu7oTy37HGqxco2Kxub+d0WLSoWuM FksuplrMu6VsMetdO5vF8d4dLA5sHptWdbJ53Lm2h83jybXNTB7v911lC2CJ0rMpyi8tSVXI yC8usVWKNrQw0jO0tNAzMrHUMzQ2j7UyMlXSt7NJSc3JLEst0rdL0MtY2/mYvWC1QMW76awN jD95uhg5OSQETCTWvLrM2MXIxSEksJRR4sjf64wQCRmJT1c+skPYwhJ/rnWxQRR9ZJQ4dHYp lHOGUeLA29NMEM4uRonTX74xg7SwCWhKbP/znwXEFhGQlmi/OokVpIhZ4DpQ+++LYHOFBXwk 2l4vA2tgEVCVmHa+C6iBg4NXwEri3QE/iNXyElu/fWIFsTkFrCW29N4GO08IqOTxz49g83kF BCVOznwCZjMD1Tdvnc0MYUtIHHzxgnkCo/AsJGWzkJTNQlK2gJF5FaNIamlxbnpusaFecWJu cWleul5yfu4mRmCEbTv2c/MOxksbgw8xCnAwKvHwvkz+HSvEmlhWXJl7iFGCg1lJhPd2x89Y Id6UxMqq1KL8+KLSnNTiQ4ymQL9NZJYSTc4HRn9eSbyhqaG5haWhubG5sZmFkjhvh8DBGCGB 9MSS1OzU1ILUIpg+Jg5OqQZGgTt3VinaT9l22uHnZoG/Sw8ZT8r7f5fh8rIW2bkr47QKtbb1 Kj3Tbf3/wlB8pYpc1VnXs0Kb15fc/CY3fWKVtfZyL/2fX1cXCVh/fuJ68WCfp6do4L0bfReC mc/0qoVvqBC7sPjvc5Hb5W+kF5/ebya9Yu7Bx4Gc2Uw/pSVbeG6pf0q7HzxHU4mlOCPRUIu5 qDgRABIqc03GAgAA X-CMS-MailID: 20191219130937eucas1p26be4db4b75dc87168bceff37f4fd5588 X-Msg-Generator: CA X-RootMTR: 20191219130937eucas1p26be4db4b75dc87168bceff37f4fd5588 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20191219130937eucas1p26be4db4b75dc87168bceff37f4fd5588 References: <20191219130921.309264-1-k.jensen@samsung.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 210.118.77.12 X-Mailman-Approved-At: Thu, 19 Dec 2019 08:56:47 -0500 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Beata Michalska , qemu-devel@nongnu.org, Max Reitz , Keith Busch , Javier Gonzalez Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Required for compliance with NVMe revision 1.2.1 or later. See NVM Express 1.2.1, Section 5.11 ("Identify command"), Figure 90 and Section 7.9 ("NVMe Qualified Names"). This also bumps the supported version to 1.2.1. Signed-off-by: Klaus Jensen --- hw/block/nvme.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/block/nvme.c b/hw/block/nvme.c index e458b8292ac0..8f7049dc2dd5 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -9,9 +9,9 @@ */ /** - * Reference Specs: http://www.nvmexpress.org, 1.2, 1.1, 1.0e + * Reference Specification: NVM Express 1.2.1 * - * http://www.nvmexpress.org/resources/ + * https://nvmexpress.org/resources/specifications/ */ /** @@ -43,6 +43,8 @@ #include "trace.h" #include "nvme.h" +#define NVME_SPEC_VER 0x00010201 + #define NVME_GUEST_ERR(trace, fmt, ...) \ do { \ (trace_##trace)(__VA_ARGS__); \ @@ -1365,6 +1367,7 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp) id->ieee[0] = 0x00; id->ieee[1] = 0x02; id->ieee[2] = 0xb3; + id->ver = cpu_to_le32(NVME_SPEC_VER); id->oacs = cpu_to_le16(0); id->frmw = 7 << 1; id->lpa = 1 << 0; @@ -1372,6 +1375,10 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp) id->cqes = (0x4 << 4) | 0x4; id->nn = cpu_to_le32(n->num_namespaces); id->oncs = cpu_to_le16(NVME_ONCS_WRITE_ZEROS | NVME_ONCS_TIMESTAMP); + + strcpy((char *) id->subnqn, "nqn.2019-08.org.qemu:"); + pstrcat((char *) id->subnqn, sizeof(id->subnqn), n->params.serial); + id->psd[0].mp = cpu_to_le16(0x9c4); id->psd[0].enlat = cpu_to_le32(0x10); id->psd[0].exlat = cpu_to_le32(0x4); @@ -1386,7 +1393,7 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp) NVME_CAP_SET_CSS(n->bar.cap, 1); NVME_CAP_SET_MPSMAX(n->bar.cap, 4); - n->bar.vs = 0x00010200; + n->bar.vs = NVME_SPEC_VER; n->bar.intmc = n->bar.intms = 0; if (n->params.cmb_size_mb) {