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Tue, 4 Feb 2020 09:52:17 +0000 From: Klaus Jensen To: Subject: [PATCH v5 05/26] nvme: populate the mandatory subnqn and ver fields Date: Tue, 4 Feb 2020 10:51:47 +0100 Message-ID: <20200204095208.269131-6-k.jensen@samsung.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200204095208.269131-1-k.jensen@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrAKsWRmVeSWpSXmKPExsWy7djPc7qX7SzjDK6sYLXY3N/OaLH/4DdW i0mHrjFaLLmYajHvlrLFrHftbBbHe3ewOLB7nNtxnt1j06pONo871/aweTy5tpnJ4/2+q2wB rFFcNimpOZllqUX6dglcGdcPnGUtWC1QceLBb/YGxp88XYycHBICJhJL7u1mArGFBFYwStyZ GtzFyAVkf2GUeDzxDStE4jOjxOpeaZiG352rWCCKljNKPPh/mxXCASo6+OEgM4RzmlFiz+F7 7BDOTkaJFzf2gS1hE9CU2P7nPwuILSIgLdF+dRJYO7PAb0aJuY0T2UASwgI+Et++XmYHsVkE VCRmN/aCNfMKWEksuf2UEeIQeaD4abB6TgFrif2rTkDVCEqcnPkEbAEzUE3z1tnMELaExMEX L8DOkxDYxS6xuuEZkMMB5LhIXJgrBTFTWOLV8S3sELaMxP+d85kg6rsZJfo+fIVqnsEoMX3Z dzaIZmuJvjM5EA2OEpO7QA4FCfNJ3HgrCLGXT2LStulQq3glOtqEIKrVJHY0bWWcwKg8C8nV s5BcPQvJ1QsYmVcxiqeWFuempxYb56WW6xUn5haX5qXrJefnbmIEppvT/45/3cG470/SIUYB DkYlHl4NR4s4IdbEsuLK3EOMEhzMSiK85/Ut44R4UxIrq1KL8uOLSnNSiw8xSnOwKInzGi96 GSskkJ5YkpqdmlqQWgSTZeLglGpg5BXrPnzhLAND8/viD/Ff7Dd9uLQw71ebVWnTEhH9+Vk7 Y2XzsldeZll8l71Tqa28IeOCmmnf0bsH1XWvqOQ5+Ldt5HwlbHe1NGBN4QbtC8+VbtxfKm39 4NQPa6VwG9eUCdaxB/gEthrmOSbNtJbyXd34+tkKi3N2y1fPt9e7vrBlFX/G6Uc/lViKMxIN tZiLihMB4tgh/TMDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrDIsWRmVeSWpSXmKPExsVy+t/xe7qX7CzjDCY2a1ps7m9ntNh/8Bur xaRD1xgtllxMtZh3S9li1rt2NovjvTtYHNg9zu04z+6xaVUnm8eda3vYPJ5c28zk8X7fVbYA 1ig9m6L80pJUhYz84hJbpWhDCyM9Q0sLPSMTSz1DY/NYKyNTJX07m5TUnMyy1CJ9uwS9jOsH zrIWrBaoOPHgN3sD40+eLkZODgkBE4nfnatYuhi5OIQEljJKbJ/1jAkiISPx6cpHdghbWOLP tS42EFtI4COjxJmlIRANpxkl9i74xwjh7GSUmDV9OTNIFZuApsT2P/9ZQGwRAWmJ9quTWEFs ZoHfjBJ/+gJBbGEBH4lvXy+DbWARUJGY3dgLtplXwEpiye2njBCb5YHip8E2cwpYS+xfdQKo hgNomZVE61FuiHJBiZMzn7BAjJeXaN46mxnClpA4+OIF8wRG4VlIymYhKZuFpGwBI/MqRpHU 0uLc9NxiQ73ixNzi0rx0veT83E2MwJjbduzn5h2MlzYGH2IU4GBU4uG9YGcRJ8SaWFZcmXuI UYKDWUmE97y+ZZwQb0piZVVqUX58UWlOavEhRlOg3yYyS4km5wPTQV5JvKGpobmFpaG5sbmx mYWSOG+HwMEYIYH0xJLU7NTUgtQimD4mDk6pBkbpC12sKgEpfzOe/VvL7Jv403wma2/U+3YJ A/mWyUrMU+Kjlur/erq06Pw1vm3tc/f/rDs4h+fe3t/TerXPPFycaVa5yznwqsSbxKuvdaXe pBqcEfm/1untTXEVQZ3XkhPXCHjrJyovCDKoe/3+V9DJM4x8Jb39Zy5suzdH0+TJB5/1NaU9 QfZKLMUZiYZazEXFiQBo+BKRzwIAAA== X-CMS-MailID: 20200204095218eucas1p2400645e2400b3d4450386a46e71b9e9a X-Msg-Generator: CA X-RootMTR: 20200204095218eucas1p2400645e2400b3d4450386a46e71b9e9a X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20200204095218eucas1p2400645e2400b3d4450386a46e71b9e9a References: <20200204095208.269131-1-k.jensen@samsung.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 210.118.77.11 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Beata Michalska , qemu-devel@nongnu.org, Max Reitz , Klaus Jensen , Keith Busch , Javier Gonzalez Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Required for compliance with NVMe revision 1.2.1 or later. See NVM Express 1.2.1, Section 5.11 ("Identify command"), Figure 90 and Section 7.9 ("NVMe Qualified Names"). This also bumps the supported version to 1.2.1. Signed-off-by: Klaus Jensen --- hw/block/nvme.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/block/nvme.c b/hw/block/nvme.c index f05ebcce3f53..9abf74da20f2 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -9,9 +9,9 @@ */ /** - * Reference Specs: http://www.nvmexpress.org, 1.2, 1.1, 1.0e + * Reference Specification: NVM Express 1.2.1 * - * http://www.nvmexpress.org/resources/ + * https://nvmexpress.org/resources/specifications/ */ /** @@ -43,6 +43,8 @@ #include "trace.h" #include "nvme.h" +#define NVME_SPEC_VER 0x00010201 + #define NVME_GUEST_ERR(trace, fmt, ...) \ do { \ (trace_##trace)(__VA_ARGS__); \ @@ -1365,6 +1367,7 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp) id->ieee[0] = 0x00; id->ieee[1] = 0x02; id->ieee[2] = 0xb3; + id->ver = cpu_to_le32(NVME_SPEC_VER); id->oacs = cpu_to_le16(0); id->frmw = 7 << 1; id->lpa = 1 << 0; @@ -1372,6 +1375,10 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp) id->cqes = (0x4 << 4) | 0x4; id->nn = cpu_to_le32(n->num_namespaces); id->oncs = cpu_to_le16(NVME_ONCS_WRITE_ZEROS | NVME_ONCS_TIMESTAMP); + + strcpy((char *) id->subnqn, "nqn.2019-08.org.qemu:"); + pstrcat((char *) id->subnqn, sizeof(id->subnqn), n->params.serial); + id->psd[0].mp = cpu_to_le16(0x9c4); id->psd[0].enlat = cpu_to_le32(0x10); id->psd[0].exlat = cpu_to_le32(0x4); @@ -1386,7 +1393,7 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp) NVME_CAP_SET_CSS(n->bar.cap, 1); NVME_CAP_SET_MPSMAX(n->bar.cap, 4); - n->bar.vs = 0x00010200; + n->bar.vs = NVME_SPEC_VER; n->bar.intmc = n->bar.intms = 0; if (n->params.cmb_size_mb) {