From patchwork Fri Feb 21 04:49:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 11395545 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 668891580 for ; Fri, 21 Feb 2020 04:49:57 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 323AD207FD for ; Fri, 21 Feb 2020 04:49:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="db0g2Z3A" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 323AD207FD Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:52264 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j50GC-0000C2-E0 for patchwork-qemu-devel@patchwork.kernel.org; Thu, 20 Feb 2020 23:49:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:45251) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j50Fg-00085K-TN for qemu-devel@nongnu.org; Thu, 20 Feb 2020 23:49:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j50Ff-0005Wr-2A for qemu-devel@nongnu.org; Thu, 20 Feb 2020 23:49:24 -0500 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:55254 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j50Fe-0005Ug-OO for qemu-devel@nongnu.org; Thu, 20 Feb 2020 23:49:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1582260561; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=fVFk6qdpzP/7d1y8e7epnpAZvVHSpmiKOcRMG5HzU2E=; b=db0g2Z3Al03NM8BlLK7TnDa/87LpOlNvnO4hxBVYpw85nuyxmYy8iHmoE4T2cR2iQWUAqd oWo+LNU3MCz/cUl+1niEyIyPENEhU8aWhQyuGFbXZ1emP/5cNAzkbBY6jySftoGkqBUcBn Jn1cZ7ziQhAvyXUzT8k2bMTFHb7FK9s= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-159-5V-TDf9gPiqknk8a3izArQ-1; Thu, 20 Feb 2020 23:49:20 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 0402D8017CC; Fri, 21 Feb 2020 04:49:19 +0000 (UTC) Received: from localhost.localdomain.com (vpn2-54-80.bne.redhat.com [10.64.54.80]) by smtp.corp.redhat.com (Postfix) with ESMTP id CCF301001281; Fri, 21 Feb 2020 04:49:13 +0000 (UTC) From: Gavin Shan To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH] hw/char/pl011: Enable TxFIFO and async transmission Date: Fri, 21 Feb 2020 15:49:08 +1100 Message-Id: <20200221044908.266883-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-MC-Unique: 5V-TDf9gPiqknk8a3izArQ-1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, pbonzini@redhat.com, maz@kernel.org, shan.gavin@gmail.com, marcandre.lureau@redhat.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The depth of TxFIFO can be 1 or 16 depending on LCR[4]. The TxFIFO is disabled when its depth is 1. It's nice to have TxFIFO enabled if possible because more characters can be piled and transmitted at once, which would have less overhead. Besides, we can be blocked because of qemu_chr_fe_write_all(), which isn't nice. This enables TxFIFO if possible. On ther other hand, the asynchronous transmission is enabled if needed, as we did in hw/char/cadence_uart.c Signed-off-by: Gavin Shan --- hw/char/pl011.c | 70 +++++++++++++++++++++++++++++++++++++---- include/hw/char/pl011.h | 2 ++ 2 files changed, 66 insertions(+), 6 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 13e784f9d9..14ed04c8c8 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -169,6 +169,66 @@ static void pl011_set_read_trigger(PL011State *s) s->read_trigger = 1; } +static gboolean pl011_xmit(GIOChannel *chan, GIOCondition cond, void *opaque) +{ + PL011State *s = (PL011State *)opaque; + int ret; + + /* instant drain the fifo when there's no back-end */ + if (!qemu_chr_fe_backend_connected(&s->chr)) { + s->write_count = 0; + return FALSE; + } + + if (!s->write_count) { + return FALSE; + } + + ret = qemu_chr_fe_write(&s->chr, s->write_fifo, s->write_count); + if (ret > 0) { + s->write_count -= ret; + memmove(s->write_fifo, s->write_fifo + ret, s->write_count); + s->flags &= ~PL011_FLAG_TXFF; + if (!s->write_count) { + s->flags |= PL011_FLAG_TXFE; + } + } + + if (s->write_count) { + guint r = qemu_chr_fe_add_watch(&s->chr, G_IO_OUT | G_IO_HUP, + pl011_xmit, s); + if (!r) { + s->write_count = 0; + s->flags &= ~PL011_FLAG_TXFF; + s->flags |= PL011_FLAG_TXFE; + return FALSE; + } + } + + s->int_level |= PL011_INT_TX; + pl011_update(s); + return FALSE; +} + +static void pl011_write_fifo(void *opaque, const unsigned char *buf, int size) +{ + PL011State *s = (PL011State *)opaque; + int depth = (s->lcr & 0x10) ? 16 : 1; + + if (size >= (depth - s->write_count)) { + size = depth - s->write_count; + s->flags |= PL011_FLAG_TXFF; + } + + if (size > 0) { + memcpy(s->write_fifo + s->write_count, buf, size); + s->write_count += size; + s->flags &= ~PL011_FLAG_TXFE; + } + + pl011_xmit(NULL, G_IO_OUT, s); +} + static void pl011_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { @@ -179,13 +239,8 @@ static void pl011_write(void *opaque, hwaddr offset, switch (offset >> 2) { case 0: /* UARTDR */ - /* ??? Check if transmitter is enabled. */ ch = value; - /* XXX this blocks entire thread. Rewrite to use - * qemu_chr_fe_write and background I/O callbacks */ - qemu_chr_fe_write_all(&s->chr, &ch, 1); - s->int_level |= PL011_INT_TX; - pl011_update(s); + pl011_write_fifo(opaque, &ch, 1); break; case 1: /* UARTRSR/UARTECR */ s->rsr = 0; @@ -207,6 +262,7 @@ static void pl011_write(void *opaque, hwaddr offset, if ((s->lcr ^ value) & 0x10) { s->read_count = 0; s->read_pos = 0; + s->write_count = 0; } s->lcr = value; pl011_set_read_trigger(s); @@ -306,6 +362,7 @@ static const VMStateDescription vmstate_pl011 = { VMSTATE_UINT32(int_enabled, PL011State), VMSTATE_UINT32(int_level, PL011State), VMSTATE_UINT32_ARRAY(read_fifo, PL011State, 16), + VMSTATE_UINT8_ARRAY(write_fifo, PL011State, 16), VMSTATE_UINT32(ilpr, PL011State), VMSTATE_UINT32(ibrd, PL011State), VMSTATE_UINT32(fbrd, PL011State), @@ -313,6 +370,7 @@ static const VMStateDescription vmstate_pl011 = { VMSTATE_INT32(read_pos, PL011State), VMSTATE_INT32(read_count, PL011State), VMSTATE_INT32(read_trigger, PL011State), + VMSTATE_INT32(write_count, PL011State), VMSTATE_END_OF_LIST() } }; diff --git a/include/hw/char/pl011.h b/include/hw/char/pl011.h index 14187165c6..aeaf332eca 100644 --- a/include/hw/char/pl011.h +++ b/include/hw/char/pl011.h @@ -38,6 +38,7 @@ typedef struct PL011State { uint32_t int_enabled; uint32_t int_level; uint32_t read_fifo[16]; + uint8_t write_fifo[16]; uint32_t ilpr; uint32_t ibrd; uint32_t fbrd; @@ -45,6 +46,7 @@ typedef struct PL011State { int read_pos; int read_count; int read_trigger; + int write_count; CharBackend chr; qemu_irq irq[6]; const unsigned char *id;