| Message ID | 20200226174607.205941-1-jusual@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v3] pcie_root_port: Add hotplug disabling option | expand |
On a Wednesday in 2020, Julia Suvorova wrote: >Make hot-plug/hot-unplug on PCIe Root Ports optional to allow libvirt >manage it and restrict unplug for the whole machine. This is going to >prevent user-initiated unplug in guests (Windows mostly). >Hotplug is enabled by default. >Usage: > -device pcie-root-port,hotplug=off,... > >If you want to disable hot-unplug on some downstream ports of one >switch, disable hot-unplug on PCIe Root Port connected to the upstream >port as well as on the selected downstream ports. > >Discussion related: > https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg00530.html > >Signed-off-by: Julia Suvorova <jusual@redhat.com> >--- >v1: https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg04868.html > >v2: https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg05192.html > * change name of the option to 'enable-hotplug' [Laine] > * change order of enabling capability bits [Igor] > * enable HPS bit [Igor] > * add option to xio3130_downstream [Ján] > >v3: > * change name of the option to 'hotplug'. Naming is hard! [Laine] > * move property under TYPE_PCIE_SLOT [Michael] > > hw/pci-bridge/pcie_root_port.c | 2 +- > hw/pci-bridge/xio3130_downstream.c | 2 +- > hw/pci/pcie.c | 11 +++++++---- > hw/pci/pcie_port.c | 1 + > include/hw/pci/pcie.h | 2 +- > include/hw/pci/pcie_port.h | 3 +++ > 6 files changed, 14 insertions(+), 7 deletions(-) > Reviewed-by: Ján Tomko <jtomko@redhat.com> Jano
diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c index 0ba4e4dea4..f1cfe9d14a 100644 --- a/hw/pci-bridge/pcie_root_port.c +++ b/hw/pci-bridge/pcie_root_port.c @@ -94,7 +94,7 @@ static void rp_realize(PCIDevice *d, Error **errp) pcie_cap_arifwd_init(d); pcie_cap_deverr_init(d); - pcie_cap_slot_init(d, s->slot); + pcie_cap_slot_init(d, s); pcie_cap_root_init(d); pcie_chassis_create(s->chassis); diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c index 153a4acad2..04aae72cd6 100644 --- a/hw/pci-bridge/xio3130_downstream.c +++ b/hw/pci-bridge/xio3130_downstream.c @@ -94,7 +94,7 @@ static void xio3130_downstream_realize(PCIDevice *d, Error **errp) } pcie_cap_flr_init(d); pcie_cap_deverr_init(d); - pcie_cap_slot_init(d, s->slot); + pcie_cap_slot_init(d, s); pcie_cap_arifwd_init(d); pcie_chassis_create(s->chassis); diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 08718188bb..0eb3a2a5d2 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -495,7 +495,7 @@ void pcie_cap_slot_unplug_request_cb(HotplugHandler *hotplug_dev, /* pci express slot for pci express root/downstream port PCI express capability slot registers */ -void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot) +void pcie_cap_slot_init(PCIDevice *dev, PCIESlot *s) { uint32_t pos = dev->exp.exp_cap; @@ -505,13 +505,16 @@ void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot) pci_long_test_and_clear_mask(dev->config + pos + PCI_EXP_SLTCAP, ~PCI_EXP_SLTCAP_PSN); pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_SLTCAP, - (slot << PCI_EXP_SLTCAP_PSN_SHIFT) | + (s->slot << PCI_EXP_SLTCAP_PSN_SHIFT) | PCI_EXP_SLTCAP_EIP | - PCI_EXP_SLTCAP_HPS | - PCI_EXP_SLTCAP_HPC | PCI_EXP_SLTCAP_PIP | PCI_EXP_SLTCAP_AIP | PCI_EXP_SLTCAP_ABP); + if (s->hotplug) { + pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_SLTCAP, + PCI_EXP_SLTCAP_HPS | + PCI_EXP_SLTCAP_HPC); + } if (dev->cap_present & QEMU_PCIE_SLTCAP_PCP) { pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_SLTCAP, diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c index f8263cb306..eb563ad435 100644 --- a/hw/pci/pcie_port.c +++ b/hw/pci/pcie_port.c @@ -147,6 +147,7 @@ static const TypeInfo pcie_port_type_info = { static Property pcie_slot_props[] = { DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0), DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0), + DEFINE_PROP_BOOL("hotplug", PCIESlot, hotplug, true), DEFINE_PROP_END_OF_LIST() }; diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index 7064875835..14c58ebdb6 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -104,7 +104,7 @@ void pcie_cap_deverr_reset(PCIDevice *dev); void pcie_cap_lnkctl_init(PCIDevice *dev); void pcie_cap_lnkctl_reset(PCIDevice *dev); -void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot); +void pcie_cap_slot_init(PCIDevice *dev, PCIESlot *s); void pcie_cap_slot_reset(PCIDevice *dev); void pcie_cap_slot_get(PCIDevice *dev, uint16_t *slt_ctl, uint16_t *slt_sta); void pcie_cap_slot_write_config(PCIDevice *dev, diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h index 4b3d254b08..caae57573b 100644 --- a/include/hw/pci/pcie_port.h +++ b/include/hw/pci/pcie_port.h @@ -55,6 +55,9 @@ struct PCIESlot { /* Disable ACS (really for a pcie_root_port) */ bool disable_acs; + + /* Indicates whether hot-plug is enabled on the slot */ + bool hotplug; QLIST_ENTRY(PCIESlot) next; };
Make hot-plug/hot-unplug on PCIe Root Ports optional to allow libvirt manage it and restrict unplug for the whole machine. This is going to prevent user-initiated unplug in guests (Windows mostly). Hotplug is enabled by default. Usage: -device pcie-root-port,hotplug=off,... If you want to disable hot-unplug on some downstream ports of one switch, disable hot-unplug on PCIe Root Port connected to the upstream port as well as on the selected downstream ports. Discussion related: https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg00530.html Signed-off-by: Julia Suvorova <jusual@redhat.com> --- v1: https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg04868.html v2: https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg05192.html * change name of the option to 'enable-hotplug' [Laine] * change order of enabling capability bits [Igor] * enable HPS bit [Igor] * add option to xio3130_downstream [Ján] v3: * change name of the option to 'hotplug'. Naming is hard! [Laine] * move property under TYPE_PCIE_SLOT [Michael] hw/pci-bridge/pcie_root_port.c | 2 +- hw/pci-bridge/xio3130_downstream.c | 2 +- hw/pci/pcie.c | 11 +++++++---- hw/pci/pcie_port.c | 1 + include/hw/pci/pcie.h | 2 +- include/hw/pci/pcie_port.h | 3 +++ 6 files changed, 14 insertions(+), 7 deletions(-)