From patchwork Tue Mar 3 00:48:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 11416993 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 03BB414B4 for ; Tue, 3 Mar 2020 01:00:29 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CD02D21D56 for ; Tue, 3 Mar 2020 01:00:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="j8PBInUN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CD02D21D56 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:40506 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j8vv9-0007eO-Sc for patchwork-qemu-devel@patchwork.kernel.org; Mon, 02 Mar 2020 20:00:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:45232) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j8vkg-00024q-EZ for qemu-devel@nongnu.org; Mon, 02 Mar 2020 19:49:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j8vkf-0004PG-B7 for qemu-devel@nongnu.org; Mon, 02 Mar 2020 19:49:38 -0500 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]:40049) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j8vkf-0004OQ-4f for qemu-devel@nongnu.org; Mon, 02 Mar 2020 19:49:37 -0500 Received: by mail-pl1-x634.google.com with SMTP id y1so503952plp.7 for ; Mon, 02 Mar 2020 16:49:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding:cc:from:to; bh=R6s1oATWB6yYMgO1fR6ahvnaLvJxcC15AdAU3isfkJU=; b=j8PBInUNjsEflSqowWu/mQPEMH6d3Mv4q85Vk/u8E4L2V/3d+adE+pLRQHM0pTL96U cy8DVoTZuw2ddg3eATwXRsp+pAxcat/Q1uKZthnsNRXMI0ntIcG9jzBWmGplnYHqLg8C f6DN9TA4H0ga1DVkz9IoCYy9SzFGZ0dYJo5AqhmUS1W4GKLJpO21wg3x5hZu3F4qA32X v2q2toHsC9dUAH8SHMONNZakMCbA8LdJCSqvWsg0FgdjYf1+1zuktu08eEzVacgqyg7c B/1zsDGhIgImOCVTCO2f3AsbRn933CiIHPxbvvtppTk+u+M/Qjc3cdUqkdQNFzWxdZpR kDIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:cc:from:to; bh=R6s1oATWB6yYMgO1fR6ahvnaLvJxcC15AdAU3isfkJU=; b=JoBF0K6qAiY9NJU4Iy4lIr0ePmWg/9Y0cLDnOGst4Z2dtIxT0SBymWsjmY3S1FxbQ2 LyOIS7W8qpiDY3n1Hi3vhZ5BXR1lpmRYPVKxYwUd0p3jWVsRmGWu78YMfk7C3pEvMqw0 kNmG8Wl95djYUNLWsJvSmnuaJ/xwtEOql8bLcgoYU5u9ub5z6KNGLOx0H3/OcRkxVnl5 p7DTBds3F96di/KtkNmSa3RYoUGufTABpWkl/IULho95b9FwIZcCh2+mGdT832jzFNaz bZLg0aPtK/KbsZWg8t84O6Kx3GWJ/UGwGgt/NpOklzIt8QsGm46g1hX2w5+kHXYfUmrO BSUA== X-Gm-Message-State: ANhLgQ3jb8Yw0cI3gjIPJo6qLbNKRjgrqDcR8Ntd2T2FO+i8mJRUccl3 lzh1uisBDkfbcjvhI4a5II3Jt/3RH6dxSQ== X-Google-Smtp-Source: ADFU+vvSj0u+mvknBgNaiaw+78kPdvNgz5Ht1gusO2FBuEYRE7JeZkaqjQqVJVAzfEdR4lFO6beMZA== X-Received: by 2002:a17:90a:3266:: with SMTP id k93mr1267410pjb.23.1583196576043; Mon, 02 Mar 2020 16:49:36 -0800 (PST) Received: from localhost ([2620:0:1000:2514:23a5:d584:6a92:3e3c]) by smtp.gmail.com with ESMTPSA id r13sm22296228pgf.1.2020.03.02.16.49.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Mar 2020 16:49:35 -0800 (PST) Subject: [PULL 23/38] target/riscv: Add hfence instructions Date: Mon, 2 Mar 2020 16:48:33 -0800 Message-Id: <20200303004848.136788-24-palmerdabbelt@google.com> X-Mailer: git-send-email 2.25.0.265.gbab2e86ba0-goog In-Reply-To: <20200303004848.136788-1-palmerdabbelt@google.com> References: <20200303004848.136788-1-palmerdabbelt@google.com> MIME-Version: 1.0 Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Alistair Francis , Palmer Dabbelt , Palmer Dabbelt From: Palmer Dabbelt To: Peter Maydell X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::634 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Alistair Francis Signed-off-by: Alistair Francis Reviewed-by: Palmer Dabbelt Signed-off-by: Palmer Dabbelt --- target/riscv/insn32.decode | 23 ++++++----- .../riscv/insn_trans/trans_privileged.inc.c | 40 +++++++++++++++++++ 2 files changed, 54 insertions(+), 9 deletions(-) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 77f794ed70..cfd9ca6d2b 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -63,20 +63,25 @@ @r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd @r2 ....... ..... ..... ... ..... ....... %rs1 %rd +@hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1 +@hfence_bvma ....... ..... ..... ... ..... ....... %rs2 %rs1 + @sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1 @sfence_vm ....... ..... ..... ... ..... ....... %rs1 # *** Privileged Instructions *** -ecall 000000000000 00000 000 00000 1110011 -ebreak 000000000001 00000 000 00000 1110011 -uret 0000000 00010 00000 000 00000 1110011 -sret 0001000 00010 00000 000 00000 1110011 -hret 0010000 00010 00000 000 00000 1110011 -mret 0011000 00010 00000 000 00000 1110011 -wfi 0001000 00101 00000 000 00000 1110011 -sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma -sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm +ecall 000000000000 00000 000 00000 1110011 +ebreak 000000000001 00000 000 00000 1110011 +uret 0000000 00010 00000 000 00000 1110011 +sret 0001000 00010 00000 000 00000 1110011 +hret 0010000 00010 00000 000 00000 1110011 +mret 0011000 00010 00000 000 00000 1110011 +wfi 0001000 00101 00000 000 00000 1110011 +hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma +hfence_bvma 0010001 ..... ..... 000 00000 1110011 @hfence_bvma +sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma +sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm # *** RV32I Base Instruction Set *** lui .................... ..... 0110111 @u diff --git a/target/riscv/insn_trans/trans_privileged.inc.c b/target/riscv/insn_trans/trans_privileged.inc.c index c5e4b3e49a..b9b5a89b52 100644 --- a/target/riscv/insn_trans/trans_privileged.inc.c +++ b/target/riscv/insn_trans/trans_privileged.inc.c @@ -108,3 +108,43 @@ static bool trans_sfence_vm(DisasContext *ctx, arg_sfence_vm *a) #endif return false; } + +static bool trans_hfence_gvma(DisasContext *ctx, arg_sfence_vma *a) +{ +#ifndef CONFIG_USER_ONLY + if (ctx->priv_ver >= PRIV_VERSION_1_10_0 && + has_ext(ctx, RVH)) { + /* Hpervisor extensions exist */ + /* + * if (env->priv == PRV_M || + * (env->priv == PRV_S && + * !riscv_cpu_virt_enabled(env) && + * get_field(ctx->mstatus_fs, MSTATUS_TVM))) { + */ + gen_helper_tlb_flush(cpu_env); + return true; + /* } */ + } +#endif + return false; +} + +static bool trans_hfence_bvma(DisasContext *ctx, arg_sfence_vma *a) +{ +#ifndef CONFIG_USER_ONLY + if (ctx->priv_ver >= PRIV_VERSION_1_10_0 && + has_ext(ctx, RVH)) { + /* Hpervisor extensions exist */ + /* + * if (env->priv == PRV_M || + * (env->priv == PRV_S && + * !riscv_cpu_virt_enabled(env) && + * get_field(ctx->mstatus_fs, MSTATUS_TVM))) { + */ + gen_helper_tlb_flush(cpu_env); + return true; + /* } */ + } +#endif + return false; +}