diff mbox series

[v2,3/3] hw/arm/fsl-imx6: Wire up USB controllers

Message ID 20200310210434.31544-4-linux@roeck-us.net (mailing list archive)
State New, archived
Headers show
Series Wire up USB controllers in i.MX6 emulations | expand

Commit Message

Guenter Roeck March 10, 2020, 9:04 p.m. UTC
With this patch, the USB controllers on 'sabrelite' are detected
and can be used to boot the system.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
v2: Use USB PHY emulation

 hw/arm/fsl-imx6.c         | 34 ++++++++++++++++++++++++++++++++++
 include/hw/arm/fsl-imx6.h |  5 +++++
 2 files changed, 39 insertions(+)

Comments

Peter Maydell March 12, 2020, 1:29 p.m. UTC | #1
On Tue, 10 Mar 2020 at 21:04, Guenter Roeck <linux@roeck-us.net> wrote:
>
> With this patch, the USB controllers on 'sabrelite' are detected
> and can be used to boot the system.
>
> Signed-off-by: Guenter Roeck <linux@roeck-us.net>

> +    for (i = 0; i < FSL_IMX6_NUM_USBS; i++) {
> +        static const int FSL_IMX6_USBn_IRQ[] = {
> +            FSL_IMX6_USB_OTG_IRQ,
> +            FSL_IMX6_USB_HOST1_IRQ,
> +            FSL_IMX6_USB_HOST2_IRQ,
> +            FSL_IMX6_USB_HOST3_IRQ,
> +        };
> +
> +        object_property_set_bool(OBJECT(&s->usbphy[i]), true, "realized",
> +                                 &error_abort);
> +        sysbus_mmio_map(SYS_BUS_DEVICE(&s->usbphy[i]), 0,
> +                        FSL_IMX6_USBPHY1_ADDR + i * 0x1000);

Are you sure these addresses are right? Four of these starting
at USBPHY1_ADDR means the last one clashes with what we define
as "FSL_IMX6_SNVSHP_ADDR 0x020CC000".

I only have the i.MX 6Dual/6Quad reference manual to hand,
so maybe this imx6 variant is different, but that document
says there are 4 USB controllers but only 2 PHY blocks.

thanks
-- PMM
Guenter Roeck March 12, 2020, 4:56 p.m. UTC | #2
On Thu, Mar 12, 2020 at 01:29:34PM +0000, Peter Maydell wrote:
> On Tue, 10 Mar 2020 at 21:04, Guenter Roeck <linux@roeck-us.net> wrote:
> >
> > With this patch, the USB controllers on 'sabrelite' are detected
> > and can be used to boot the system.
> >
> > Signed-off-by: Guenter Roeck <linux@roeck-us.net>
> 
> > +    for (i = 0; i < FSL_IMX6_NUM_USBS; i++) {
> > +        static const int FSL_IMX6_USBn_IRQ[] = {
> > +            FSL_IMX6_USB_OTG_IRQ,
> > +            FSL_IMX6_USB_HOST1_IRQ,
> > +            FSL_IMX6_USB_HOST2_IRQ,
> > +            FSL_IMX6_USB_HOST3_IRQ,
> > +        };
> > +
> > +        object_property_set_bool(OBJECT(&s->usbphy[i]), true, "realized",
> > +                                 &error_abort);
> > +        sysbus_mmio_map(SYS_BUS_DEVICE(&s->usbphy[i]), 0,
> > +                        FSL_IMX6_USBPHY1_ADDR + i * 0x1000);
> 
> Are you sure these addresses are right? Four of these starting
> at USBPHY1_ADDR means the last one clashes with what we define
> as "FSL_IMX6_SNVSHP_ADDR 0x020CC000".
> 
> I only have the i.MX 6Dual/6Quad reference manual to hand,
> so maybe this imx6 variant is different, but that document
> says there are 4 USB controllers but only 2 PHY blocks.
> 
Oops, I think you are correct. Good catch. I'll re-check the datsheet
and send an updated patch.

Thanks,
Guenter
diff mbox series

Patch

diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index ecc62855f2..92b3955817 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -22,6 +22,7 @@ 
 #include "qemu/osdep.h"
 #include "qapi/error.h"
 #include "hw/arm/fsl-imx6.h"
+#include "hw/usb/imx-usb-phy.h"
 #include "hw/boards.h"
 #include "hw/qdev-properties.h"
 #include "sysemu/sysemu.h"
@@ -86,6 +87,15 @@  static void fsl_imx6_init(Object *obj)
                               TYPE_IMX_USDHC);
     }
 
+    for (i = 0; i < FSL_IMX6_NUM_USBS; i++) {
+        snprintf(name, NAME_SIZE, "usb%d", i);
+        sysbus_init_child_obj(obj, name, &s->usb[i], sizeof(s->usb[i]),
+                              TYPE_CHIPIDEA);
+        snprintf(name, NAME_SIZE, "usbphy%d", i);
+        sysbus_init_child_obj(obj, name, &s->usbphy[i], sizeof(s->usbphy[i]),
+                              TYPE_IMX_USBPHY);
+    }
+
     for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) {
         snprintf(name, NAME_SIZE, "spi%d", i + 1);
         sysbus_init_child_obj(obj, name, &s->spi[i], sizeof(s->spi[i]),
@@ -349,6 +359,30 @@  static void fsl_imx6_realize(DeviceState *dev, Error **errp)
                                             esdhc_table[i].irq));
     }
 
+    /* USB */
+    for (i = 0; i < FSL_IMX6_NUM_USBS; i++) {
+        static const int FSL_IMX6_USBn_IRQ[] = {
+            FSL_IMX6_USB_OTG_IRQ,
+            FSL_IMX6_USB_HOST1_IRQ,
+            FSL_IMX6_USB_HOST2_IRQ,
+            FSL_IMX6_USB_HOST3_IRQ,
+        };
+
+        object_property_set_bool(OBJECT(&s->usbphy[i]), true, "realized",
+                                 &error_abort);
+        sysbus_mmio_map(SYS_BUS_DEVICE(&s->usbphy[i]), 0,
+                        FSL_IMX6_USBPHY1_ADDR + i * 0x1000);
+
+        object_property_set_bool(OBJECT(&s->usb[i]), true, "realized",
+                                 &error_abort);
+        sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0,
+                        FSL_IMX6_USBOH3_USB_ADDR + i * 0x200);
+
+        sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
+                           qdev_get_gpio_in(DEVICE(&s->a9mpcore),
+                                            FSL_IMX6_USBn_IRQ[i]));
+    }
+
     /* Initialize all ECSPI */
     for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) {
         static const struct {
diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
index 60eadccb42..edc3fce3fa 100644
--- a/include/hw/arm/fsl-imx6.h
+++ b/include/hw/arm/fsl-imx6.h
@@ -30,6 +30,8 @@ 
 #include "hw/sd/sdhci.h"
 #include "hw/ssi/imx_spi.h"
 #include "hw/net/imx_fec.h"
+#include "hw/usb/chipidea.h"
+#include "hw/usb/imx-usb-phy.h"
 #include "exec/memory.h"
 #include "cpu.h"
 
@@ -44,6 +46,7 @@ 
 #define FSL_IMX6_NUM_ESDHCS 4
 #define FSL_IMX6_NUM_ECSPIS 5
 #define FSL_IMX6_NUM_WDTS 2
+#define FSL_IMX6_NUM_USBS 4
 
 typedef struct FslIMX6State {
     /*< private >*/
@@ -62,6 +65,8 @@  typedef struct FslIMX6State {
     SDHCIState     esdhc[FSL_IMX6_NUM_ESDHCS];
     IMXSPIState    spi[FSL_IMX6_NUM_ECSPIS];
     IMX2WdtState   wdt[FSL_IMX6_NUM_WDTS];
+    IMXUSBPHYState usbphy[FSL_IMX6_NUM_USBS];
+    ChipideaState  usb[FSL_IMX6_NUM_USBS];
     IMXFECState    eth;
     MemoryRegion   rom;
     MemoryRegion   caam;