From patchwork Wed Mar 25 02:59:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chen Qun X-Patchwork-Id: 11456863 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 45402139A for ; Wed, 25 Mar 2020 03:00:44 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 258AC20658 for ; Wed, 25 Mar 2020 03:00:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 258AC20658 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:58540 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jGwHb-0002o2-59 for patchwork-qemu-devel@patchwork.kernel.org; Tue, 24 Mar 2020 23:00:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45448) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jGwGd-00013y-Ph for qemu-devel@nongnu.org; Tue, 24 Mar 2020 22:59:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jGwGc-0004zR-Kk for qemu-devel@nongnu.org; Tue, 24 Mar 2020 22:59:43 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:3725 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jGwGc-0004x0-90; Tue, 24 Mar 2020 22:59:42 -0400 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id CD1F3D59120C6882B2BE; Wed, 25 Mar 2020 10:59:37 +0800 (CST) Received: from huawei.com (10.133.205.93) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.487.0; Wed, 25 Mar 2020 10:59:28 +0800 From: Chen Qun To: , Subject: [PATCH v5 3/3] timer/exynos4210_mct: Remove redundant statement in exynos4210_mct_write() Date: Wed, 25 Mar 2020 10:59:19 +0800 Message-ID: <20200325025919.21316-4-kuhn.chenqun@huawei.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20200325025919.21316-1-kuhn.chenqun@huawei.com> References: <20200325025919.21316-1-kuhn.chenqun@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.133.205.93] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.191 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , zhang.zhanghailiang@huawei.com, Igor Mitsyanko , laurent@vivier.eu, Euler Robot , Chen Qun , philmd@redhat.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Clang static code analyzer show warning: hw/timer/exynos4210_mct.c:1370:9: warning: Value stored to 'index' is never read index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ hw/timer/exynos4210_mct.c:1399:9: warning: Value stored to 'index' is never read index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ hw/timer/exynos4210_mct.c:1441:9: warning: Value stored to 'index' is never read index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Reported-by: Euler Robot Signed-off-by: Chen Qun Reviewed-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- Cc: Igor Mitsyanko Cc: Peter Maydell --- hw/timer/exynos4210_mct.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c index 944120aea5..570cf7075b 100644 --- a/hw/timer/exynos4210_mct.c +++ b/hw/timer/exynos4210_mct.c @@ -1367,7 +1367,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset, case L0_TCNTB: case L1_TCNTB: lt_i = GET_L_TIMER_IDX(offset); - index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); /* * TCNTB is updated to internal register only after CNT expired. @@ -1396,7 +1395,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset, case L0_ICNTB: case L1_ICNTB: lt_i = GET_L_TIMER_IDX(offset); - index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); s->l_timer[lt_i].reg.wstat |= L_WSTAT_ICNTB_WRITE; s->l_timer[lt_i].reg.cnt[L_REG_CNT_ICNTB] = value & @@ -1438,8 +1436,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset, case L0_FRCNTB: case L1_FRCNTB: lt_i = GET_L_TIMER_IDX(offset); - index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); - DPRINTF("local timer[%d] FRCNTB write %llx\n", lt_i, value); s->l_timer[lt_i].reg.wstat |= L_WSTAT_FRCCNTB_WRITE;