From patchwork Thu Mar 26 19:31:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Robert Foley X-Patchwork-Id: 11460949 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 590C681 for ; Thu, 26 Mar 2020 20:00:39 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1CB00206E6 for ; Thu, 26 Mar 2020 20:00:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="geQNT4hF" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1CB00206E6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:59302 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jHYgA-0007Po-5m for patchwork-qemu-devel@patchwork.kernel.org; Thu, 26 Mar 2020 16:00:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58913) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jHYKg-0007Do-Nb for qemu-devel@nongnu.org; Thu, 26 Mar 2020 15:38:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jHYKe-0001nj-TC for qemu-devel@nongnu.org; Thu, 26 Mar 2020 15:38:26 -0400 Received: from mail-qv1-xf42.google.com ([2607:f8b0:4864:20::f42]:34263) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jHYKe-0001n7-Fh for qemu-devel@nongnu.org; Thu, 26 Mar 2020 15:38:24 -0400 Received: by mail-qv1-xf42.google.com with SMTP id o18so3707709qvf.1 for ; Thu, 26 Mar 2020 12:38:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=j8NGLZ7/SvXTE+Cdm9c8nbCOhjKd8q7CnsDXGNqwiOY=; b=geQNT4hFHQHp8hBFSjUnLLHB4h6UDutB/OXhpS5Vop0nd6/T0yHpJXwcGEkbl2dUIk BRYbIFUrMHvx8iZct29GdSURYvP0i+zDI/tFvP1GWaU+jPOWH1evihJu1Sb7Ausqtly8 Q7wLwU/eE2pvidLkvWX8cca8g6j7I4nlAD13HkWZOwf/QR7n+e7nmxfqgid9KfNe5JgQ lIyn7aGGE129JqgP6bC/Kn1LNmLnkBR9VHcIansuXyluHoU/oYOPwPIFi7bShZ7gRYEi eo30VH13FTEdpim+r60QgG9uelk/dn/KR8AQ7rmXy2R8b+V7C3WhYhJ2pI3GCXmnEEVb mTog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=j8NGLZ7/SvXTE+Cdm9c8nbCOhjKd8q7CnsDXGNqwiOY=; b=tUq3qPAvprkWBDUMScHmgd35tdMIkEW/FAm+HA9xXXAIjtsRvVdaYREsSQBo97MJFb K1gEIr+QJvm+IoWBya3urIn1P72JxQgV/RpBkek/QwF2QAtl1wH9wsCjsQZcCJbxAozr ARtAlteqHxO3OzrdnPWXf4fEEoDy4gAlIg6m6VwX6fLJK3gS2Bym7Wzv+baP8st0Ghe3 0xOegXhBrIbHiic1ohSP1vY7EVlzsr3XFbE9hOml5TUHqafyPjje/IeQ+zP2ZpV+V6jm 8cQWMkMr7hGfCtGZqvqLbW7c1YNTYztgd2gk5cZaPPETUm+lHEVFSJGb1b2koPrmQ853 +WRw== X-Gm-Message-State: ANhLgQ0UY269ihhf4kFGtezwj0SMla+vWPySTbWYtQpJe6PfNBJ/sMm8 9tdYk5nBPkI6UFeyAp7yjVbRdguvkY6BOA== X-Google-Smtp-Source: ADFU+vtFZDT9Siq/RpfifG/feJ0LNxDaqcLo6L9FPYi1HNX3YT9ysZ4YhE8epPgOlsOqNw8b+m7H2A== X-Received: by 2002:a05:6214:11ec:: with SMTP id e12mr10231849qvu.89.1585251503259; Thu, 26 Mar 2020 12:38:23 -0700 (PDT) Received: from Rfoley-MA01.hsd1.ma.comcast.net ([2601:199:4480:60c0:fd55:4e67:1038:8302]) by smtp.gmail.com with ESMTPSA id u51sm2161916qth.46.2020.03.26.12.38.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Mar 2020 12:38:22 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v8 36/74] i386: use cpu_reset_interrupt Date: Thu, 26 Mar 2020 15:31:18 -0400 Message-Id: <20200326193156.4322-37-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200326193156.4322-1-robert.foley@linaro.org> References: <20200326193156.4322-1-robert.foley@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::f42 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, "Emilio G . Cota" , peter.puhov@linaro.org, Paolo Bonzini , alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Paolo Bonzini Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Paolo Bonzini Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/i386/hax-all.c | 4 ++-- target/i386/hvf/x86hvf.c | 8 ++++---- target/i386/kvm.c | 14 +++++++------- target/i386/seg_helper.c | 13 ++++++------- target/i386/svm_helper.c | 2 +- target/i386/whpx-all.c | 10 +++++----- 6 files changed, 25 insertions(+), 26 deletions(-) diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c index 25bf80b5f2..1edd6c77df 100644 --- a/target/i386/hax-all.c +++ b/target/i386/hax-all.c @@ -425,7 +425,7 @@ static int hax_vcpu_interrupt(CPUArchState *env) irq = cpu_get_pic_interrupt(env); if (irq >= 0) { hax_inject_interrupt(env, irq); - cpu->interrupt_request &= ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); } } @@ -473,7 +473,7 @@ static int hax_vcpu_hax_exec(CPUArchState *env) } if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { - cpu->interrupt_request &= ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); apic_poll_irq(x86_cpu->apic_state); } diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c index cbb2144724..90f1662d0c 100644 --- a/target/i386/hvf/x86hvf.c +++ b/target/i386/hvf/x86hvf.c @@ -402,7 +402,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state) if (cpu_state->interrupt_request & CPU_INTERRUPT_NMI) { if (!(env->hflags2 & HF2_NMI_MASK) && !(info & VMCS_INTR_VALID)) { - cpu_state->interrupt_request &= ~CPU_INTERRUPT_NMI; + cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_NMI); info = VMCS_INTR_VALID | VMCS_INTR_T_NMI | EXCP02_NMI; wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, info); } else { @@ -414,7 +414,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state) (cpu_state->interrupt_request & CPU_INTERRUPT_HARD) && (EFLAGS(env) & IF_MASK) && !(info & VMCS_INTR_VALID)) { int line = cpu_get_pic_interrupt(&x86cpu->env); - cpu_state->interrupt_request &= ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_HARD); if (line >= 0) { wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, line | VMCS_INTR_VALID | VMCS_INTR_T_HWINTR); @@ -440,7 +440,7 @@ int hvf_process_events(CPUState *cpu_state) } if (cpu_state->interrupt_request & CPU_INTERRUPT_POLL) { - cpu_state->interrupt_request &= ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_POLL); apic_poll_irq(cpu->apic_state); } if (((cpu_state->interrupt_request & CPU_INTERRUPT_HARD) && @@ -453,7 +453,7 @@ int hvf_process_events(CPUState *cpu_state) do_cpu_sipi(cpu); } if (cpu_state->interrupt_request & CPU_INTERRUPT_TPR) { - cpu_state->interrupt_request &= ~CPU_INTERRUPT_TPR; + cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_TPR); hvf_cpu_synchronize_state(cpu_state); apic_handle_tpr_access_report(cpu->apic_state, env->eip, env->tpr_access_type); diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 9f1e28387f..44a4d45980 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -3657,7 +3657,7 @@ static int kvm_put_vcpu_events(X86CPU *cpu, int level) */ events.smi.pending = cs->interrupt_request & CPU_INTERRUPT_SMI; events.smi.latched_init = cs->interrupt_request & CPU_INTERRUPT_INIT; - cs->interrupt_request &= ~(CPU_INTERRUPT_INIT | CPU_INTERRUPT_SMI); + cpu_reset_interrupt(cs, CPU_INTERRUPT_INIT | CPU_INTERRUPT_SMI); } else { /* Keep these in cs->interrupt_request. */ events.smi.pending = 0; @@ -4020,7 +4020,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) if (cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { qemu_mutex_lock_iothread(); - cpu->interrupt_request &= ~CPU_INTERRUPT_NMI; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_NMI); qemu_mutex_unlock_iothread(); DPRINTF("injected NMI\n"); ret = kvm_vcpu_ioctl(cpu, KVM_NMI); @@ -4031,7 +4031,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) } if (cpu->interrupt_request & CPU_INTERRUPT_SMI) { qemu_mutex_lock_iothread(); - cpu->interrupt_request &= ~CPU_INTERRUPT_SMI; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_SMI); qemu_mutex_unlock_iothread(); DPRINTF("injected SMI\n"); ret = kvm_vcpu_ioctl(cpu, KVM_SMI); @@ -4067,7 +4067,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) (env->eflags & IF_MASK)) { int irq; - cpu->interrupt_request &= ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); irq = cpu_get_pic_interrupt(env); if (irq >= 0) { struct kvm_interrupt intr; @@ -4138,7 +4138,7 @@ int kvm_arch_process_async_events(CPUState *cs) /* We must not raise CPU_INTERRUPT_MCE if it's not supported. */ assert(env->mcg_cap); - cs->interrupt_request &= ~CPU_INTERRUPT_MCE; + cpu_reset_interrupt(cs, CPU_INTERRUPT_MCE); kvm_cpu_synchronize_state(cs); @@ -4168,7 +4168,7 @@ int kvm_arch_process_async_events(CPUState *cs) } if (cs->interrupt_request & CPU_INTERRUPT_POLL) { - cs->interrupt_request &= ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cs, CPU_INTERRUPT_POLL); apic_poll_irq(cpu->apic_state); } if (((cs->interrupt_request & CPU_INTERRUPT_HARD) && @@ -4181,7 +4181,7 @@ int kvm_arch_process_async_events(CPUState *cs) do_cpu_sipi(cpu); } if (cs->interrupt_request & CPU_INTERRUPT_TPR) { - cs->interrupt_request &= ~CPU_INTERRUPT_TPR; + cpu_reset_interrupt(cs, CPU_INTERRUPT_TPR); kvm_cpu_synchronize_state(cs); apic_handle_tpr_access_report(cpu->apic_state, env->eip, env->tpr_access_type); diff --git a/target/i386/seg_helper.c b/target/i386/seg_helper.c index b96de068ca..818f65f35f 100644 --- a/target/i386/seg_helper.c +++ b/target/i386/seg_helper.c @@ -1332,7 +1332,7 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interrupt_request) switch (interrupt_request) { #if !defined(CONFIG_USER_ONLY) case CPU_INTERRUPT_POLL: - cs->interrupt_request &= ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cs, CPU_INTERRUPT_POLL); apic_poll_irq(cpu->apic_state); break; #endif @@ -1341,23 +1341,22 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interrupt_request) break; case CPU_INTERRUPT_SMI: cpu_svm_check_intercept_param(env, SVM_EXIT_SMI, 0, 0); - cs->interrupt_request &= ~CPU_INTERRUPT_SMI; + cpu_reset_interrupt(cs, CPU_INTERRUPT_SMI); do_smm_enter(cpu); break; case CPU_INTERRUPT_NMI: cpu_svm_check_intercept_param(env, SVM_EXIT_NMI, 0, 0); - cs->interrupt_request &= ~CPU_INTERRUPT_NMI; + cpu_reset_interrupt(cs, CPU_INTERRUPT_NMI); env->hflags2 |= HF2_NMI_MASK; do_interrupt_x86_hardirq(env, EXCP02_NMI, 1); break; case CPU_INTERRUPT_MCE: - cs->interrupt_request &= ~CPU_INTERRUPT_MCE; + cpu_reset_interrupt(cs, CPU_INTERRUPT_MCE); do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0); break; case CPU_INTERRUPT_HARD: cpu_svm_check_intercept_param(env, SVM_EXIT_INTR, 0, 0); - cs->interrupt_request &= ~(CPU_INTERRUPT_HARD | - CPU_INTERRUPT_VIRQ); + cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ); intno = cpu_get_pic_interrupt(env); qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=0x%02x\n", intno); @@ -1372,7 +1371,7 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interrupt_request) qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=0x%02x\n", intno); do_interrupt_x86_hardirq(env, intno, 1); - cs->interrupt_request &= ~CPU_INTERRUPT_VIRQ; + cpu_reset_interrupt(cs, CPU_INTERRUPT_VIRQ); break; #endif } diff --git a/target/i386/svm_helper.c b/target/i386/svm_helper.c index 7b8105a1c3..63eb136743 100644 --- a/target/i386/svm_helper.c +++ b/target/i386/svm_helper.c @@ -700,7 +700,7 @@ void do_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) env->hflags &= ~HF_GUEST_MASK; env->intercept = 0; env->intercept_exceptions = 0; - cs->interrupt_request &= ~CPU_INTERRUPT_VIRQ; + cpu_reset_interrupt(cs, CPU_INTERRUPT_VIRQ); env->tsc_offset = 0; env->gdt.base = x86_ldq_phys(cs, env->vm_hsave + offsetof(struct vmcb, diff --git a/target/i386/whpx-all.c b/target/i386/whpx-all.c index efc2d88810..d5beb4a5e2 100644 --- a/target/i386/whpx-all.c +++ b/target/i386/whpx-all.c @@ -790,14 +790,14 @@ static void whpx_vcpu_pre_run(CPUState *cpu) if (!vcpu->interruption_pending && cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { - cpu->interrupt_request &= ~CPU_INTERRUPT_NMI; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_NMI); vcpu->interruptable = false; new_int.InterruptionType = WHvX64PendingNmi; new_int.InterruptionPending = 1; new_int.InterruptionVector = 2; } if (cpu->interrupt_request & CPU_INTERRUPT_SMI) { - cpu->interrupt_request &= ~CPU_INTERRUPT_SMI; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_SMI); } } @@ -820,7 +820,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu) vcpu->interruptable && (env->eflags & IF_MASK)) { assert(!new_int.InterruptionPending); if (cpu->interrupt_request & CPU_INTERRUPT_HARD) { - cpu->interrupt_request &= ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); irq = cpu_get_pic_interrupt(env); if (irq >= 0) { new_int.InterruptionType = WHvX64PendingInterrupt; @@ -911,7 +911,7 @@ static void whpx_vcpu_process_async_events(CPUState *cpu) } if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { - cpu->interrupt_request &= ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); apic_poll_irq(x86_cpu->apic_state); } @@ -927,7 +927,7 @@ static void whpx_vcpu_process_async_events(CPUState *cpu) } if (cpu->interrupt_request & CPU_INTERRUPT_TPR) { - cpu->interrupt_request &= ~CPU_INTERRUPT_TPR; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_TPR); whpx_cpu_synchronize_state(cpu); apic_handle_tpr_access_report(x86_cpu->apic_state, env->eip, env->tpr_access_type);