From patchwork Sat Mar 28 03:06:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenyi Qiang X-Patchwork-Id: 11463399 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8BA6781 for ; Sat, 28 Mar 2020 03:06:07 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6C569206F1 for ; Sat, 28 Mar 2020 03:06:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6C569206F1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:49602 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jI1nS-0003vq-Gz for patchwork-qemu-devel@patchwork.kernel.org; Fri, 27 Mar 2020 23:06:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55447) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jI1ml-0002hw-CI for qemu-devel@nongnu.org; Fri, 27 Mar 2020 23:05:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jI1mj-0003fV-NJ for qemu-devel@nongnu.org; Fri, 27 Mar 2020 23:05:22 -0400 Received: from mga12.intel.com ([192.55.52.136]:6616) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jI1mj-0003R2-EQ for qemu-devel@nongnu.org; Fri, 27 Mar 2020 23:05:21 -0400 IronPort-SDR: 1WTEGZrFeA5B2CFxSKx9TdZhVzpK2IhSb3+J0DSE6V4ge/ZvUqjCKDfS/tCJ23jlx3T9+gyB2n o1X3qVSsfIAg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2020 20:05:19 -0700 IronPort-SDR: 2ElM3DRZg3lEXYAWmPHoKn2vAGwIvXMdvxcXHgtejrIlGJiH7pWo4QR0lf2dDWatrhCSNT53+k gxpJyE8egDJA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,314,1580803200"; d="scan'208";a="421319434" Received: from chenyi-pc.sh.intel.com ([10.239.159.72]) by orsmga005.jf.intel.com with ESMTP; 27 Mar 2020 20:05:17 -0700 From: Chenyi Qiang To: Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PATCH v2 1/4] target/i386: add missing vmx features for several CPU models Date: Sat, 28 Mar 2020 11:06:22 +0800 Message-Id: <20200328030625.16428-2-chenyi.qiang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200328030625.16428-1-chenyi.qiang@intel.com> References: <20200328030625.16428-1-chenyi.qiang@intel.com> X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 192.55.52.136 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Xiaoyao Li , qemu-devel@nongnu.org, Robert Hoo Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Add some missing VMX features in Skylake-Server, Cascadelake-Server and Icelake-Server CPU models based on the output of Paolo's script. Signed-off-by: Chenyi Qiang --- target/i386/cpu.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 34b511f078..4123d5910e 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3059,6 +3059,7 @@ static X86CPUDefinition builtin_x86_defs[] = { VMX_SECONDARY_EXEC_RDRAND_EXITING | VMX_SECONDARY_EXEC_ENABLE_INVPCID | VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS | VMX_SECONDARY_EXEC_RDSEED_EXITING | VMX_SECONDARY_EXEC_ENABLE_PML, + .features[FEAT_VMX_VMFUNC] = MSR_VMX_VMFUNC_EPT_SWITCHING, .xlevel = 0x80000008, .model_id = "Intel Xeon Processor (Skylake)", .versions = (X86CPUVersionDefinition[]) { @@ -3187,6 +3188,7 @@ static X86CPUDefinition builtin_x86_defs[] = { VMX_SECONDARY_EXEC_RDRAND_EXITING | VMX_SECONDARY_EXEC_ENABLE_INVPCID | VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS | VMX_SECONDARY_EXEC_RDSEED_EXITING | VMX_SECONDARY_EXEC_ENABLE_PML, + .features[FEAT_VMX_VMFUNC] = MSR_VMX_VMFUNC_EPT_SWITCHING, .xlevel = 0x80000008, .model_id = "Intel Xeon Processor (Cascadelake)", .versions = (X86CPUVersionDefinition[]) { @@ -3534,7 +3536,9 @@ static X86CPUDefinition builtin_x86_defs[] = { VMX_SECONDARY_EXEC_APIC_REGISTER_VIRT | VMX_SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY | VMX_SECONDARY_EXEC_RDRAND_EXITING | VMX_SECONDARY_EXEC_ENABLE_INVPCID | - VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS, + VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS | + VMX_SECONDARY_EXEC_RDSEED_EXITING | VMX_SECONDARY_EXEC_ENABLE_PML, + .features[FEAT_VMX_VMFUNC] = MSR_VMX_VMFUNC_EPT_SWITCHING, .xlevel = 0x80000008, .model_id = "Intel Xeon Processor (Icelake)", .versions = (X86CPUVersionDefinition[]) {