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[81.231.232.130]) by smtp.gmail.com with ESMTPSA id s7sm79548lfb.40.2020.04.20.10.52.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Apr 2020 10:52:59 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org Subject: [PATCH v2 6/6] target/microblaze: Add the pvr-user2 property Date: Mon, 20 Apr 2020 19:52:50 +0200 Message-Id: <20200420175250.25777-7-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200420175250.25777-1-edgar.iglesias@gmail.com> References: <20200420175250.25777-1-edgar.iglesias@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::242; envelope-from=edgar.iglesias@gmail.com; helo=mail-lj1-x242.google.com X-detected-operating-system: by eggs1p.gnu.org: Error: [-] PROGRAM ABORT : Malformed IPv6 address (bad octet value). Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2a00:1450:4864:20::242 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: figlesia@xilinx.com, peter.maydell@linaro.org, sstabellini@kernel.org, edgar.iglesias@xilinx.com, sai.pavan.boddu@xilinx.com, frasse.iglesias@gmail.com, alistair@alistair23.me, richard.henderson@linaro.org, frederic.konrad@adacore.com, philmd@redhat.com, luc.michel@greensocs.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: "Edgar E. Iglesias" Add the pvr-user2 property to control the user-defined PVR1 User2 register. Reviewed-by: Alistair Francis Reviewed-by: Luc Michel Signed-off-by: Edgar E. Iglesias --- target/microblaze/cpu.c | 2 ++ target/microblaze/cpu.h | 1 + 2 files changed, 3 insertions(+) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 53027846c4..22d08dc8cb 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -196,6 +196,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) (cpu->cfg.pvr == C_PVR_FULL ? PVR0_PVR_FULL_MASK : 0) | cpu->cfg.pvr_user1; + env->pvr.regs[1] = cpu->cfg.pvr_user2; env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) | (cpu->cfg.use_fpu > 1 ? PVR2_USE_FPU2_MASK : 0) | (cpu->cfg.use_hw_mul ? PVR2_USE_HW_MUL_MASK : 0) | @@ -294,6 +295,7 @@ static Property mb_properties[] = { DEFINE_PROP_STRING("version", MicroBlazeCPU, cfg.version), DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL), DEFINE_PROP_UINT8("pvr-user1", MicroBlazeCPU, cfg.pvr_user1, 0), + DEFINE_PROP_UINT32("pvr-user2", MicroBlazeCPU, cfg.pvr_user2, 0), DEFINE_PROP_END_OF_LIST(), }; diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 7bb5a3d6c6..a31134b65c 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -308,6 +308,7 @@ struct MicroBlazeCPU { bool div_zero_exception; bool unaligned_exceptions; uint8_t pvr_user1; + uint32_t pvr_user2; char *version; uint8_t pvr; } cfg;