| Message ID | 20200506183219.2166987-1-patrick@stwcx.xyz (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v3] aspeed: Add support for the sonorapass-bmc board | expand |
On Wed, 6 May 2020 at 19:32, Patrick Williams <patrick@stwcx.xyz> wrote: > > Sonora Pass is a 2 socket x86 motherboard designed by Facebook > and supported by OpenBMC. Strapping configuration was obtained > from hardware and i2c configuration is based on dts found at: > > https://github.com/facebook/openbmc-linux/blob/1633c87b8ba7c162095787c988979b748ba65dc8/arch/arm/boot/dts/aspeed-bmc-facebook-sonorapass.dts > > Booted a test image of http://github.com/facebook/openbmc to login > prompt. > > Signed-off-by: Patrick Williams <patrick@stwcx.xyz> > Reviewed-by: Amithash Prasad <amithash@fb.com> > Reviewed-by: Cédric Le Goater <clg@kaod.org> Looking up through the thread I can't find the email where Amithash gave his reviewed-by tag -- did I miss it? PS: for the future, v2/v3 etc patches should be sent as fresh emails, not as followups/replies to the v1. thanks -- PMM
On Mon, May 11, 2020 at 11:54:42AM +0100, Peter Maydell wrote: > On Wed, 6 May 2020 at 19:32, Patrick Williams <patrick@stwcx.xyz> wrote: > Looking up through the thread I can't find the email where > Amithash gave his reviewed-by tag -- did I miss it? I probably shouldn't have done this. I asked Amithash off-list for his approval to add his Reviewed-by. I'll ask him to reply to this with confirmation. > PS: for the future, v2/v3 etc patches should be sent as > fresh emails, not as followups/replies to the v1. Thanks. I missed this detail when I read [1] before but I see it now. It seems like LKML tends to do the opposite? 1. https://wiki.qemu.org/Contribute/SubmitAPatch
On Mon, 11 May 2020 at 14:13, Patrick Williams <patrick@stwcx.xyz> wrote: > > On Mon, May 11, 2020 at 11:54:42AM +0100, Peter Maydell wrote: > > On Wed, 6 May 2020 at 19:32, Patrick Williams <patrick@stwcx.xyz> wrote: > > > Looking up through the thread I can't find the email where > > Amithash gave his reviewed-by tag -- did I miss it? > > I probably shouldn't have done this. I asked Amithash off-list for his > approval to add his Reviewed-by. I'll ask him to reply to this with > confirmation. Thanks; no big deal. I figured I'd check because the details of how we handle reviewed-by tags are a bit non-obvious if you haven't worked with projects like QEMU or the kernel that use this email-based workflow before. > > PS: for the future, v2/v3 etc patches should be sent as > > fresh emails, not as followups/replies to the v1. > > Thanks. I missed this detail when I read [1] before but I see it now. > It seems like LKML tends to do the opposite? I don't do kernel development but AIUI they have the same general approach we do. Their process doc: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-patches.rst#n771 says: "for a multi-patch series, it is generally best to avoid using In-Reply-To: to link to older versions of the series. This way multiple versions of the patch don't become an unmanageable forest of references in email clients." thanks -- PMM
On Wed, 6 May 2020 at 19:32, Patrick Williams <patrick@stwcx.xyz> wrote: > > Sonora Pass is a 2 socket x86 motherboard designed by Facebook > and supported by OpenBMC. Strapping configuration was obtained > from hardware and i2c configuration is based on dts found at: > > https://github.com/facebook/openbmc-linux/blob/1633c87b8ba7c162095787c988979b748ba65dc8/arch/arm/boot/dts/aspeed-bmc-facebook-sonorapass.dts > > Booted a test image of http://github.com/facebook/openbmc to login > prompt. > > Signed-off-by: Patrick Williams <patrick@stwcx.xyz> > Reviewed-by: Amithash Prasad <amithash@fb.com> > Reviewed-by: Cédric Le Goater <clg@kaod.org> Applied to target-arm.next, thanks. -- PMM
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 6f4d7075c4..74c46681e8 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -74,6 +74,21 @@ struct AspeedBoardState { SCU_AST2500_HW_STRAP_ACPI_ENABLE | \ SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER)) +/* Sonorapass hardware value: 0xF100D216 */ +#define SONORAPASS_BMC_HW_STRAP1 ( \ + SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ + SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ + SCU_AST2500_HW_STRAP_UART_DEBUG | \ + SCU_AST2500_HW_STRAP_RESERVED28 | \ + SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ + SCU_HW_STRAP_VGA_CLASS_CODE | \ + SCU_HW_STRAP_LPC_RESET_PIN | \ + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ + SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ + SCU_HW_STRAP_VGA_BIOS_ROM | \ + SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ + SCU_AST2500_HW_STRAP_RESERVED1) + /* Swift hardware value: 0xF11AD206 */ #define SWIFT_BMC_HW_STRAP1 ( \ AST2500_HW_STRAP1_DEFAULTS | \ @@ -434,6 +449,49 @@ static void swift_bmc_i2c_init(AspeedBoardState *bmc) i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 12), "tmp105", 0x4a); } +static void sonorapass_bmc_i2c_init(AspeedBoardState *bmc) +{ + AspeedSoCState *soc = &bmc->soc; + + /* bus 2 : */ + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2), "tmp105", 0x48); + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2), "tmp105", 0x49); + /* bus 2 : pca9546 @ 0x73 */ + + /* bus 3 : pca9548 @ 0x70 */ + + /* bus 4 : */ + uint8_t *eeprom4_54 = g_malloc0(8 * 1024); + smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), 0x54, + eeprom4_54); + /* PCA9539 @ 0x76, but PCA9552 is compatible */ + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "pca9552", 0x76); + /* PCA9539 @ 0x77, but PCA9552 is compatible */ + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "pca9552", 0x77); + + /* bus 6 : */ + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 6), "tmp105", 0x48); + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 6), "tmp105", 0x49); + /* bus 6 : pca9546 @ 0x73 */ + + /* bus 8 : */ + uint8_t *eeprom8_56 = g_malloc0(8 * 1024); + smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), 0x56, + eeprom8_56); + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "pca9552", 0x60); + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "pca9552", 0x61); + /* bus 8 : adc128d818 @ 0x1d */ + /* bus 8 : adc128d818 @ 0x1f */ + + /* bus 13 : pca9548 @ 0x71 + * - channel 3: + * - tmm421 @ 0x4c + * - tmp421 @ 0x4e + * - tmp421 @ 0x4f + */ + +} + static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc) { AspeedSoCState *soc = &bmc->soc; @@ -552,6 +610,21 @@ static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data) mc->default_ram_size = 512 * MiB; }; +static void aspeed_machine_sonorapass_class_init(ObjectClass *oc, void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "OCP SonoraPass BMC (ARM1176)"; + amc->soc_name = "ast2500-a1"; + amc->hw_strap1 = SONORAPASS_BMC_HW_STRAP1; + amc->fmc_model = "mx66l1g45g"; + amc->spi_model = "mx66l1g45g"; + amc->num_cs = 2; + amc->i2c_init = sonorapass_bmc_i2c_init; + mc->default_ram_size = 512 * MiB; +}; + static void aspeed_machine_swift_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); @@ -631,6 +704,10 @@ static const TypeInfo aspeed_machine_types[] = { .name = MACHINE_TYPE_NAME("swift-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_swift_class_init, + }, { + .name = MACHINE_TYPE_NAME("sonorapass-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_sonorapass_class_init, }, { .name = MACHINE_TYPE_NAME("witherspoon-bmc"), .parent = TYPE_ASPEED_MACHINE,