From patchwork Thu May 21 16:39:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Robert Foley X-Patchwork-Id: 11563471 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4CFDF739 for ; Thu, 21 May 2020 16:53:30 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 243C420738 for ; Thu, 21 May 2020 16:53:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="qxolO3NH" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 243C420738 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:41296 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jboRl-0006dT-AQ for patchwork-qemu-devel@patchwork.kernel.org; Thu, 21 May 2020 12:53:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49788) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jboIH-0002Tc-Lz for qemu-devel@nongnu.org; Thu, 21 May 2020 12:43:41 -0400 Received: from mail-qv1-xf44.google.com ([2607:f8b0:4864:20::f44]:41358) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jboIG-0006XM-Mm for qemu-devel@nongnu.org; Thu, 21 May 2020 12:43:41 -0400 Received: by mail-qv1-xf44.google.com with SMTP id v15so3357276qvr.8 for ; Thu, 21 May 2020 09:43:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dMJD65Hlj8sZEjsVc6zG0Ir/AhvAmDKltVf3k3r4CgY=; b=qxolO3NHBjbuWSRVm36ecn5krJ1xJDM5MsGZe5bSWEmRz2qykCI/o2yo/NPfJ3CxQP UqPRK/+HK3cnZax4qIl/EXV5PqZd/zWzN9uyUetgiB/7NayvCslb5KR2+jKttR6Flm2o oXT0VevNgkoD14jUvTXvMbjiDA++0c8Oxv6GGAMV8JWe2+MxNWrBAx2195PKKvY0FGUv PG/n6uqVOMcQO9T4xYRpIRjbIaoyaCYpJzMPk/pkLqj/XsNniKiEmGjm9TwiyZqI64dO BBWUZDbpuiCo6+JCd2RC0lsYhp/6YKmL9IeXLsLkxmkzObsyg3H/Y7sf+uHiLQXhrWbv 7/sg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dMJD65Hlj8sZEjsVc6zG0Ir/AhvAmDKltVf3k3r4CgY=; b=KuYo6IZlTZ1XttfxunsmF1aGxFv4mcvDe0aIuZ31VVzTZ6DAkqGoTEoXH/hBnM+dTj AP7RBtA9iY8mWIQvj5HPQICSUwFqQ+IaGzoYUSOoyfVcrPswBkMMG47xGUHTWq+gJpgM 0f8zY3Cgh2CuHwolhLwB7vI2o+7CIvVy4DUtfs3Pyss60uRE2EAFGma2QbJu0bfkYDB4 FP57VJ0OD4OWpUpz8kIEM95KCIbp1HR5sdWHHnEPvf0al/8/b38wz6HHX1Xh9H4ksLCK jvb98sA5Is5fMQH7qEGkGPiaQ+DfJT4CjB7xo4OlYJ4pNzZ+/0SbblF5XHeFRxBcys4j D1Zw== X-Gm-Message-State: AOAM5332XtZyh+abh8PK8/yt4zD86oNYgCBXHRSlXW7VrP2A8UeW86n4 LjrjaM4h5eunNvDZK7wQYLVJ/iNenEvjMw== X-Google-Smtp-Source: ABdhPJzU6+L9m9eKgmFy4T2CpzBwZGdFhnu+SPFlwBxgP8YjJY+IKwveBx7QWv1alWwOabyJgBzpMA== X-Received: by 2002:a0c:f590:: with SMTP id k16mr11076855qvm.81.1590079418769; Thu, 21 May 2020 09:43:38 -0700 (PDT) Received: from Rfoley-MA01.hsd1.ma.comcast.net ([2601:199:4480:60c0:1944:c530:655c:5583]) by smtp.gmail.com with ESMTPSA id x24sm5923829qth.57.2020.05.21.09.43.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2020 09:43:37 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 18/74] arm: convert to cpu_halted Date: Thu, 21 May 2020 12:39:15 -0400 Message-Id: <20200521164011.638-19-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::f44; envelope-from=robert.foley@linaro.org; helo=mail-qv1-xf44.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , robert.foley@linaro.org, alex.bennee@linaro.org, richard.henderson@linaro.org, cota@braap.org, qemu-arm@nongnu.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" Cc: Andrzej Zaborowski Cc: Peter Maydell Cc: qemu-arm@nongnu.org Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- hw/arm/omap1.c | 4 ++-- hw/arm/pxa2xx_gpio.c | 2 +- hw/arm/pxa2xx_pic.c | 2 +- target/arm/arm-powerctl.c | 6 +++--- target/arm/cpu.c | 2 +- target/arm/op_helper.c | 2 +- 6 files changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 761cc17ea9..83b1d63f27 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -1776,7 +1776,7 @@ static uint64_t omap_clkdsp_read(void *opaque, hwaddr addr, case 0x18: /* DSP_SYSST */ cpu = CPU(s->cpu); return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start | - (cpu->halted << 6); /* Quite useless... */ + (cpu_halted(cpu) << 6); /* Quite useless... */ } OMAP_BAD_REG(addr); @@ -3797,7 +3797,7 @@ void omap_mpu_wakeup(void *opaque, int irq, int req) struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque; CPUState *cpu = CPU(mpu->cpu); - if (cpu->halted) { + if (cpu_halted(cpu)) { cpu_interrupt(cpu, CPU_INTERRUPT_EXITTB); } } diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c index f8df3cc227..23b4a06a4f 100644 --- a/hw/arm/pxa2xx_gpio.c +++ b/hw/arm/pxa2xx_gpio.c @@ -132,7 +132,7 @@ static void pxa2xx_gpio_set(void *opaque, int line, int level) pxa2xx_gpio_irq_update(s); /* Wake-up GPIOs */ - if (cpu->halted && (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) { + if (cpu_halted(cpu) && (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) { cpu_interrupt(cpu, CPU_INTERRUPT_EXITTB); } } diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c index 203d4d28af..057448c2ed 100644 --- a/hw/arm/pxa2xx_pic.c +++ b/hw/arm/pxa2xx_pic.c @@ -58,7 +58,7 @@ static void pxa2xx_pic_update(void *opaque) PXA2xxPICState *s = (PXA2xxPICState *) opaque; CPUState *cpu = CPU(s->cpu); - if (cpu->halted) { + if (cpu_halted(cpu)) { mask[0] = s->int_pending[0] & (s->int_enabled[0] | s->int_idle); mask[1] = s->int_pending[1] & (s->int_enabled[1] | s->int_idle); if (mask[0] || mask[1]) { diff --git a/target/arm/arm-powerctl.c b/target/arm/arm-powerctl.c index b75f813b40..f0db413519 100644 --- a/target/arm/arm-powerctl.c +++ b/target/arm/arm-powerctl.c @@ -64,7 +64,7 @@ static void arm_set_cpu_on_async_work(CPUState *target_cpu_state, /* Initialize the cpu we are turning on */ cpu_reset(target_cpu_state); - target_cpu_state->halted = 0; + cpu_halted_set(target_cpu_state, 0); if (info->target_aa64) { if ((info->target_el < 3) && arm_feature(&target_cpu->env, @@ -241,7 +241,7 @@ static void arm_set_cpu_on_and_reset_async_work(CPUState *target_cpu_state, /* Initialize the cpu we are turning on */ cpu_reset(target_cpu_state); - target_cpu_state->halted = 0; + cpu_halted_set(target_cpu_state, 0); /* Finally set the power status */ assert(qemu_mutex_iothread_locked()); @@ -297,7 +297,7 @@ static void arm_set_cpu_off_async_work(CPUState *target_cpu_state, assert(qemu_mutex_iothread_locked()); target_cpu->power_state = PSCI_OFF; - target_cpu_state->halted = 1; + cpu_halted_set(target_cpu_state, 1); target_cpu_state->exception_index = EXCP_HLT; } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 32bec156f2..dc435a18a1 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -175,7 +175,7 @@ static void arm_cpu_reset(DeviceState *dev) env->vfp.xregs[ARM_VFP_MVFR2] = cpu->isar.mvfr2; cpu->power_state = cpu->start_powered_off ? PSCI_OFF : PSCI_ON; - s->halted = cpu->start_powered_off; + cpu_halted_set(s, cpu->start_powered_off); if (arm_feature(env, ARM_FEATURE_IWMMXT)) { env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q'; diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index eb0de080f1..88c86a4346 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -305,7 +305,7 @@ void HELPER(wfi)(CPUARMState *env, uint32_t insn_len) } cs->exception_index = EXCP_HLT; - cs->halted = 1; + cpu_halted_set(cs, 1); cpu_loop_exit(cs); }