| Message ID | 20200521164011.638-48-robert.foley@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | per-CPU locks | expand |
On Thu, May 21, 2020 at 12:39:44PM -0400, Robert Foley wrote: > From: "Emilio G. Cota" <cota@braap.org> > > Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > Reviewed-by: Alex Bennée <alex.bennee@linaro.org> > Signed-off-by: Emilio G. Cota <cota@braap.org> > Signed-off-by: Robert Foley <robert.foley@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > --- > target/cris/cpu.c | 2 +- > target/cris/helper.c | 4 ++-- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/target/cris/cpu.c b/target/cris/cpu.c > index cff6b9eabf..6d7e266042 100644 > --- a/target/cris/cpu.c > +++ b/target/cris/cpu.c > @@ -37,7 +37,7 @@ static void cris_cpu_set_pc(CPUState *cs, vaddr value) > > static bool cris_cpu_has_work(CPUState *cs) > { > - return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); > + return cpu_interrupt_request(cs) & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); > } > > static void cris_cpu_reset(DeviceState *dev) > diff --git a/target/cris/helper.c b/target/cris/helper.c > index b5159b8357..67946d9246 100644 > --- a/target/cris/helper.c > +++ b/target/cris/helper.c > @@ -131,7 +131,7 @@ void crisv10_cpu_do_interrupt(CPUState *cs) > > D_LOG("exception index=%d interrupt_req=%d\n", > cs->exception_index, > - cs->interrupt_request); > + cpu_interrupt_request(cs)); > > if (env->dslot) { > /* CRISv10 never takes interrupts while in a delay-slot. */ > @@ -193,7 +193,7 @@ void cris_cpu_do_interrupt(CPUState *cs) > > D_LOG("exception index=%d interrupt_req=%d\n", > cs->exception_index, > - cs->interrupt_request); > + cpu_interrupt_request(cs)); > > switch (cs->exception_index) { > case EXCP_BREAK: > -- > 2.17.1 >
diff --git a/target/cris/cpu.c b/target/cris/cpu.c index cff6b9eabf..6d7e266042 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -37,7 +37,7 @@ static void cris_cpu_set_pc(CPUState *cs, vaddr value) static bool cris_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); + return cpu_interrupt_request(cs) & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); } static void cris_cpu_reset(DeviceState *dev) diff --git a/target/cris/helper.c b/target/cris/helper.c index b5159b8357..67946d9246 100644 --- a/target/cris/helper.c +++ b/target/cris/helper.c @@ -131,7 +131,7 @@ void crisv10_cpu_do_interrupt(CPUState *cs) D_LOG("exception index=%d interrupt_req=%d\n", cs->exception_index, - cs->interrupt_request); + cpu_interrupt_request(cs)); if (env->dslot) { /* CRISv10 never takes interrupts while in a delay-slot. */ @@ -193,7 +193,7 @@ void cris_cpu_do_interrupt(CPUState *cs) D_LOG("exception index=%d interrupt_req=%d\n", cs->exception_index, - cs->interrupt_request); + cpu_interrupt_request(cs)); switch (cs->exception_index) { case EXCP_BREAK: