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[2/5] linux headers: Import virtio-iommu header from Linux

Message ID 20200821162839.3182051-3-jean-philippe@linaro.org (mailing list archive)
State New, archived
Headers show
Series virtio-iommu: Built-in topology and x86 support | expand

Commit Message

Jean-Philippe Brucker Aug. 21, 2020, 4:28 p.m. UTC 
Import virtio-iommu topology definitions from Linux. These changes
haven't been upstreamed yet.

Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
---
 include/standard-headers/linux/virtio_iommu.h | 44 +++++++++++++++++++
 1 file changed, 44 insertions(+)
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Patch

diff --git a/include/standard-headers/linux/virtio_iommu.h b/include/standard-headers/linux/virtio_iommu.h
index b9443b83a13..ee158c37c36 100644
--- a/include/standard-headers/linux/virtio_iommu.h
+++ b/include/standard-headers/linux/virtio_iommu.h
@@ -16,6 +16,7 @@ 
 #define VIRTIO_IOMMU_F_BYPASS			3
 #define VIRTIO_IOMMU_F_PROBE			4
 #define VIRTIO_IOMMU_F_MMIO			5
+#define VIRTIO_IOMMU_F_TOPOLOGY			6
 
 struct virtio_iommu_range_64 {
 	uint64_t					start;
@@ -27,6 +28,17 @@  struct virtio_iommu_range_32 {
 	uint32_t					end;
 };
 
+struct virtio_iommu_topo_config {
+	/* Number of topology description structures */
+	uint16_t					count;
+	/*
+	 * Offset to the first topology description structure
+	 * (virtio_iommu_topo_*) from the start of the virtio_iommu config
+	 * space. Aligned on 8 bytes.
+	 */
+	uint16_t					offset;
+};
+
 struct virtio_iommu_config {
 	/* Supported page sizes */
 	uint64_t					page_size_mask;
@@ -36,6 +48,38 @@  struct virtio_iommu_config {
 	struct virtio_iommu_range_32		domain_range;
 	/* Probe buffer size */
 	uint32_t					probe_size;
+	struct virtio_iommu_topo_config		topo_config;
+};
+
+#define VIRTIO_IOMMU_TOPO_PCI_RANGE		0x1
+#define VIRTIO_IOMMU_TOPO_MMIO			0x2
+
+struct virtio_iommu_topo_pci_range {
+	/* VIRTIO_IOMMU_TOPO_PCI_RANGE */
+	uint8_t					type;
+	uint8_t					reserved;
+	/* Length of this structure */
+	uint16_t					length;
+	/* First endpoint ID in the range */
+	uint32_t					endpoint_start;
+	/* PCI domain number */
+	uint16_t					segment;
+	/* PCI Bus:Device.Function range */
+	uint16_t					bdf_start;
+	uint16_t					bdf_end;
+	uint16_t					padding;
+};
+
+struct virtio_iommu_topo_mmio {
+	/* VIRTIO_IOMMU_TOPO_MMIO */
+	uint8_t					type;
+	uint8_t					reserved;
+	/* Length of this structure */
+	uint16_t					length;
+	/* Endpoint ID */
+	uint32_t					endpoint;
+	/* Address of the first MMIO region */
+	uint64_t					address;
 };
 
 /* Request types */