From patchwork Mon Nov 2 05:40:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Liang X-Patchwork-Id: 11872999 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 33B3A6A2 for ; Mon, 2 Nov 2020 05:52:59 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0283820760 for ; Mon, 2 Nov 2020 05:52:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0283820760 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:34356 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kZSm2-0005r2-17 for patchwork-qemu-devel@patchwork.kernel.org; Mon, 02 Nov 2020 00:52:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:51210) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kZSdN-0002VT-QZ; Mon, 02 Nov 2020 00:44:01 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:2316) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kZSdL-0001NU-T4; Mon, 02 Nov 2020 00:44:01 -0500 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4CPhfy2H0Mzkc74; Mon, 2 Nov 2020 13:43:54 +0800 (CST) Received: from localhost.localdomain (10.175.124.27) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.487.0; Mon, 2 Nov 2020 13:43:46 +0800 From: Peng Liang To: , Subject: [RFC v3 08/10] target/arm: Introduce user_mask to indicate whether the feature is set explicitly Date: Mon, 2 Nov 2020 13:40:53 +0800 Message-ID: <20201102054055.686143-9-liangpeng10@huawei.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201102054055.686143-1-liangpeng10@huawei.com> References: <20201102054055.686143-1-liangpeng10@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.124.27] X-CFilter-Loop: Reflected Received-SPF: pass client-ip=45.249.212.190; envelope-from=liangpeng10@huawei.com; helo=szxga04-in.huawei.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/11/02 00:43:42 X-ACL-Warn: Detected OS = Linux 3.1-3.10 [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, drjones@redhat.com, zhang.zhanghailiang@huawei.com, mst@redhat.com, cohuck@redhat.com, xiexiangyou@huawei.com, Peng Liang , pbonzini@redhat.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" To add CPU feature dependencies, we need to known whether a CPU feature is set explicitly or automatically by dependencies mechanism. Introduce user_mask to do that. Signed-off-by: zhanghailiang Signed-off-by: Peng Liang --- target/arm/cpu.c | 2 ++ target/arm/cpu.h | 1 + 2 files changed, 3 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index c5530550ece0..8c84a16d92a8 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1306,6 +1306,8 @@ static void arm_cpu_set_feature_prop(Object *obj, Visitor *v, const char *name, return; } + isar->user_mask[feat->reg] |= MAKE_64BIT_MASK(feat->shift, feat->length); + if (value) { if (object_property_get_bool(obj, feat->name, &error_abort)) { return; diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c20f1ae20429..1ee653a712fd 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -932,6 +932,7 @@ struct ARMCPU { */ struct ARMISARegisters { uint64_t regs[ID_MAX]; + uint64_t user_mask[ID_MAX]; } isar; uint64_t midr; uint32_t revidr;