From patchwork Mon Nov 16 02:48:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chen Qun X-Patchwork-Id: 11907251 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2D1D516C1 for ; Mon, 16 Nov 2020 02:50:22 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 701C6216C4 for ; Mon, 16 Nov 2020 02:50:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 701C6216C4 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:40700 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1keUay-0008Fg-1K for patchwork-qemu-devel@patchwork.kernel.org; Sun, 15 Nov 2020 21:50:20 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:58510) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1keUZj-0006Xt-4n; Sun, 15 Nov 2020 21:49:03 -0500 Received: from szxga06-in.huawei.com ([45.249.212.32]:2094) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1keUZf-0002sI-E7; Sun, 15 Nov 2020 21:49:02 -0500 Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga06-in.huawei.com (SkyGuard) with ESMTP id 4CZD6L0f8ZzhbCG; Mon, 16 Nov 2020 10:48:42 +0800 (CST) Received: from huawei.com (10.175.104.175) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.487.0; Mon, 16 Nov 2020 10:48:45 +0800 From: Chen Qun To: , Subject: [PATCH v3 1/7] target/i386: silence the compiler warnings in gen_shiftd_rm_T1 Date: Mon, 16 Nov 2020 10:48:04 +0800 Message-ID: <20201116024810.2415819-2-kuhn.chenqun@huawei.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20201116024810.2415819-1-kuhn.chenqun@huawei.com> References: <20201116024810.2415819-1-kuhn.chenqun@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.104.175] X-CFilter-Loop: Reflected Received-SPF: pass client-ip=45.249.212.32; envelope-from=kuhn.chenqun@huawei.com; helo=szxga06-in.huawei.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/11/15 21:48:52 X-ACL-Warn: Detected OS = Linux 3.1-3.10 [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , zhang.zhanghailiang@huawei.com, Richard Henderson , Paolo Bonzini , ganqixin@huawei.com, Euler Robot , Chen Qun , Eduardo Habkost Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The current "#ifdef TARGET_X86_64" statement affects the compiler's determination of fall through. When using -Wimplicit-fallthrough in our CFLAGS on GCC9, the compiler showed warning: target/i386/translate.c: In function ‘gen_shiftd_rm_T1’: target/i386/translate.c:1773:12: warning: this statement may fall through [-Wimplicit-fallthrough=] if (is_right) { ^ target/i386/translate.c:1782:5: note: here case MO_32: ^~~~ Reported-by: Euler Robot Signed-off-by: Chen Qun Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth --- v1->v2: Add comments to explain the two case of fall through, depending on whether TARGET_X86_64 is defined. Cc: Thomas Huth Cc: Paolo Bonzini Cc: Richard Henderson Cc: Eduardo Habkost --- target/i386/translate.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index caea6f5fb1..77cb66208e 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -1777,9 +1777,12 @@ static void gen_shiftd_rm_T1(DisasContext *s, MemOp ot, int op1, } else { tcg_gen_deposit_tl(s->T1, s->T0, s->T1, 16, 16); } - /* FALLTHRU */ -#ifdef TARGET_X86_64 + /* + * If TARGET_X86_64 defined then fall through into MO_32 case, + * otherwise fall through default case. + */ case MO_32: +#ifdef TARGET_X86_64 /* Concatenate the two 32-bit values and use a 64-bit shift. */ tcg_gen_subi_tl(s->tmp0, count, 1); if (is_right) {