diff mbox series

[v3,2/4] hw/mips: Use bl_gen_kernel_jump to generate bootloaders

Message ID 20210127065424.114125-3-jiaxun.yang@flygoat.com (mailing list archive)
State New, archived
Headers show
Series MIPS Bootloader helper | expand

Commit Message

Jiaxun Yang Jan. 27, 2021, 6:54 a.m. UTC 
Replace embedded binary with generated code.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 hw/mips/boston.c    | 17 ++---------------
 hw/mips/fuloong2e.c | 28 ++++------------------------
 hw/mips/malta.c     | 41 ++++++++++-------------------------------
 3 files changed, 16 insertions(+), 70 deletions(-)

Comments

Philippe Mathieu-Daudé Feb. 21, 2021, 12:11 p.m. UTC | #1 
On 1/27/21 7:54 AM, Jiaxun Yang wrote:
> Replace embedded binary with generated code.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>  hw/mips/boston.c    | 17 ++---------------
>  hw/mips/fuloong2e.c | 28 ++++------------------------
>  hw/mips/malta.c     | 41 ++++++++++-------------------------------
>  3 files changed, 16 insertions(+), 70 deletions(-)
> 
> diff --git a/hw/mips/boston.c b/hw/mips/boston.c
> index 467fbc1c8b..b976c8199a 100644
> --- a/hw/mips/boston.c
> +++ b/hw/mips/boston.c
> @@ -27,6 +27,7 @@
>  #include "hw/ide/ahci.h"
>  #include "hw/loader.h"
>  #include "hw/loader-fit.h"
> +#include "hw/mips/bootloader.h"
>  #include "hw/mips/cps.h"
>  #include "hw/pci-host/xilinx-pcie.h"
>  #include "hw/qdev-clock.h"
> @@ -324,21 +325,7 @@ static void gen_firmware(uint32_t *p, hwaddr kernel_entry, hwaddr fdt_addr,
>       * a2/$6 = 0
>       * a3/$7 = 0
>       */
> -    stl_p(p++, 0x2404fffe);                     /* li   $4, -2 */
> -                                                /* lui  $5, hi(fdt_addr) */
> -    stl_p(p++, 0x3c050000 | ((fdt_addr >> 16) & 0xffff));
> -    if (fdt_addr & 0xffff) {                    /* ori  $5, lo(fdt_addr) */
> -        stl_p(p++, 0x34a50000 | (fdt_addr & 0xffff));
> -    }
> -    stl_p(p++, 0x34060000);                     /* li   $6, 0 */
> -    stl_p(p++, 0x34070000);                     /* li   $7, 0 */
> -
> -    /* Load kernel entry address & jump to it */
> -                                                /* lui  $25, hi(kernel_entry) */
> -    stl_p(p++, 0x3c190000 | ((kernel_entry >> 16) & 0xffff));
> -                                                /* ori  $25, lo(kernel_entry) */
> -    stl_p(p++, 0x37390000 | (kernel_entry & 0xffff));
> -    stl_p(p++, 0x03200009);                     /* jr   $25 */
> +    bl_gen_jump_kernel(&p, 0, (int32_t)-2, fdt_addr, 0, 0, kernel_entry);

OK.

>  }
>  
>  static const void *boston_fdt_filter(void *opaque, const void *fdt_orig,
> diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
> index bac2adbd5a..1ae84ecf92 100644
> --- a/hw/mips/fuloong2e.c
> +++ b/hw/mips/fuloong2e.c
> @@ -33,6 +33,7 @@
>  #include "hw/i2c/smbus_eeprom.h"
>  #include "hw/block/flash.h"
>  #include "hw/mips/mips.h"
> +#include "hw/mips/bootloader.h"
>  #include "hw/mips/cpudevs.h"
>  #include "hw/pci/pci.h"
>  #include "qemu/log.h"
> @@ -185,30 +186,9 @@ static void write_bootloader(CPUMIPSState *env, uint8_t *base,
>      /* Second part of the bootloader */
>      p = (uint32_t *)(base + 0x040);
>  
> -    /* lui a0, 0 */
> -    stl_p(p++, 0x3c040000);
> -    /* ori a0, a0, 2 */
> -    stl_p(p++, 0x34840002);
> -    /* lui a1, high(ENVP_VADDR) */
> -    stl_p(p++, 0x3c050000 | ((ENVP_VADDR >> 16) & 0xffff));
> -    /* ori a1, a0, low(ENVP_VADDR) */
> -    stl_p(p++, 0x34a50000 | (ENVP_VADDR & 0xffff));
> -    /* lui a2, high(ENVP_VADDR + 8) */
> -    stl_p(p++, 0x3c060000 | (((ENVP_VADDR + 8) >> 16) & 0xffff));
> -    /* ori a2, a2, low(ENVP_VADDR + 8) */
> -    stl_p(p++, 0x34c60000 | ((ENVP_VADDR + 8) & 0xffff));
> -    /* lui a3, high(env->ram_size) */
> -    stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16));
> -    /* ori a3, a3, low(env->ram_size) */
> -    stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));
> -    /* lui ra, high(kernel_addr) */
> -    stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));
> -    /* ori ra, ra, low(kernel_addr) */
> -    stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff));
> -    /* jr ra */
> -    stl_p(p++, 0x03e00008);
> -    /* nop */
> -    stl_p(p++, 0x00000000);
> +    bl_gen_jump_kernel(&p, ENVP_VADDR - 64, 2, ENVP_VADDR,

Where do you get $sp from?

> +                       ENVP_VADDR + 8, loaderparams.ram_size,
> +                       kernel_addr);
>  }
>  
>  static void main_cpu_reset(void *opaque)
> diff --git a/hw/mips/malta.c b/hw/mips/malta.c
> index 9afc0b427b..ffd67b8293 100644
> --- a/hw/mips/malta.c
> +++ b/hw/mips/malta.c
> @@ -37,6 +37,7 @@
>  #include "hw/i2c/smbus_eeprom.h"
>  #include "hw/block/flash.h"
>  #include "hw/mips/mips.h"
> +#include "hw/mips/bootloader.h"
>  #include "hw/mips/cpudevs.h"
>  #include "hw/pci/pci.h"
>  #include "sysemu/sysemu.h"
> @@ -844,6 +845,7 @@ static void write_bootloader_nanomips(uint8_t *base, uint64_t run_addr,
>  static void write_bootloader(uint8_t *base, uint64_t run_addr,
>                               uint64_t kernel_entry)
>  {
> +    target_ulong a0;
>      uint32_t *p;
>  
>      /* Small bootloader */
> @@ -872,30 +874,6 @@ static void write_bootloader(uint8_t *base, uint64_t run_addr,
>      /* Second part of the bootloader */
>      p = (uint32_t *) (base + 0x580);
>  
> -    if (semihosting_get_argc()) {
> -        /* Preserve a0 content as arguments have been passed */

I'll keep that comment.

> -        stl_p(p++, 0x00000000);              /* nop */
> -    } else {
> -        stl_p(p++, 0x24040002);              /* addiu a0, zero, 2 */
> -    }
> -
> -    /* lui sp, high(ENVP_VADDR) */
> -    stl_p(p++, 0x3c1d0000 | (((ENVP_VADDR - 64) >> 16) & 0xffff));
> -    /* ori sp, sp, low(ENVP_VADDR) */
> -    stl_p(p++, 0x37bd0000 | ((ENVP_VADDR - 64) & 0xffff));
> -    /* lui a1, high(ENVP_VADDR) */
> -    stl_p(p++, 0x3c050000 | ((ENVP_VADDR >> 16) & 0xffff));
> -    /* ori a1, a1, low(ENVP_VADDR) */
> -    stl_p(p++, 0x34a50000 | (ENVP_VADDR & 0xffff));
> -    /* lui a2, high(ENVP_VADDR + 8) */
> -    stl_p(p++, 0x3c060000 | (((ENVP_VADDR + 8) >> 16) & 0xffff));
> -    /* ori a2, a2, low(ENVP_VADDR + 8) */
> -    stl_p(p++, 0x34c60000 | ((ENVP_VADDR + 8) & 0xffff));
> -    /* lui a3, high(ram_low_size) */
> -    stl_p(p++, 0x3c070000 | (loaderparams.ram_low_size >> 16));
> -    /* ori a3, a3, low(ram_low_size) */
> -    stl_p(p++, 0x34e70000 | (loaderparams.ram_low_size & 0xffff));
> -
>      /* Load BAR registers as done by YAMON */
>      stl_p(p++, 0x3c09b400);                  /* lui t1, 0xb400 */
>  
> @@ -947,13 +925,14 @@ static void write_bootloader(uint8_t *base, uint64_t run_addr,
>  #endif
>      stl_p(p++, 0xad280088);                  /* sw t0, 0x0088(t1) */
>  
> -    /* Jump to kernel code */
> -    stl_p(p++, 0x3c1f0000 |
> -          ((kernel_entry >> 16) & 0xffff));  /* lui ra, high(kernel_entry) */
> -    stl_p(p++, 0x37ff0000 |
> -          (kernel_entry & 0xffff));          /* ori ra, ra, low(kernel_entry) */
> -    stl_p(p++, 0x03e00009);                  /* jalr ra */
> -    stl_p(p++, 0x00000000);                  /* nop */
> +    if (semihosting_get_argc()) {
> +        a0 = 0;
> +    } else {
> +        a0 = 2;
> +    }
> +    bl_gen_jump_kernel(&p, ENVP_VADDR - 64, a0, ENVP_VADDR,
> +                       ENVP_VADDR + 8, loaderparams.ram_low_size,
> +                       kernel_entry);

OK.

>  
>      /* YAMON subroutines */
>      p = (uint32_t *) (base + 0x800);
>
diff mbox series

Patch

diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index 467fbc1c8b..b976c8199a 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -27,6 +27,7 @@ 
 #include "hw/ide/ahci.h"
 #include "hw/loader.h"
 #include "hw/loader-fit.h"
+#include "hw/mips/bootloader.h"
 #include "hw/mips/cps.h"
 #include "hw/pci-host/xilinx-pcie.h"
 #include "hw/qdev-clock.h"
@@ -324,21 +325,7 @@  static void gen_firmware(uint32_t *p, hwaddr kernel_entry, hwaddr fdt_addr,
      * a2/$6 = 0
      * a3/$7 = 0
      */
-    stl_p(p++, 0x2404fffe);                     /* li   $4, -2 */
-                                                /* lui  $5, hi(fdt_addr) */
-    stl_p(p++, 0x3c050000 | ((fdt_addr >> 16) & 0xffff));
-    if (fdt_addr & 0xffff) {                    /* ori  $5, lo(fdt_addr) */
-        stl_p(p++, 0x34a50000 | (fdt_addr & 0xffff));
-    }
-    stl_p(p++, 0x34060000);                     /* li   $6, 0 */
-    stl_p(p++, 0x34070000);                     /* li   $7, 0 */
-
-    /* Load kernel entry address & jump to it */
-                                                /* lui  $25, hi(kernel_entry) */
-    stl_p(p++, 0x3c190000 | ((kernel_entry >> 16) & 0xffff));
-                                                /* ori  $25, lo(kernel_entry) */
-    stl_p(p++, 0x37390000 | (kernel_entry & 0xffff));
-    stl_p(p++, 0x03200009);                     /* jr   $25 */
+    bl_gen_jump_kernel(&p, 0, (int32_t)-2, fdt_addr, 0, 0, kernel_entry);
 }
 
 static const void *boston_fdt_filter(void *opaque, const void *fdt_orig,
diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index bac2adbd5a..1ae84ecf92 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -33,6 +33,7 @@ 
 #include "hw/i2c/smbus_eeprom.h"
 #include "hw/block/flash.h"
 #include "hw/mips/mips.h"
+#include "hw/mips/bootloader.h"
 #include "hw/mips/cpudevs.h"
 #include "hw/pci/pci.h"
 #include "qemu/log.h"
@@ -185,30 +186,9 @@  static void write_bootloader(CPUMIPSState *env, uint8_t *base,
     /* Second part of the bootloader */
     p = (uint32_t *)(base + 0x040);
 
-    /* lui a0, 0 */
-    stl_p(p++, 0x3c040000);
-    /* ori a0, a0, 2 */
-    stl_p(p++, 0x34840002);
-    /* lui a1, high(ENVP_VADDR) */
-    stl_p(p++, 0x3c050000 | ((ENVP_VADDR >> 16) & 0xffff));
-    /* ori a1, a0, low(ENVP_VADDR) */
-    stl_p(p++, 0x34a50000 | (ENVP_VADDR & 0xffff));
-    /* lui a2, high(ENVP_VADDR + 8) */
-    stl_p(p++, 0x3c060000 | (((ENVP_VADDR + 8) >> 16) & 0xffff));
-    /* ori a2, a2, low(ENVP_VADDR + 8) */
-    stl_p(p++, 0x34c60000 | ((ENVP_VADDR + 8) & 0xffff));
-    /* lui a3, high(env->ram_size) */
-    stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16));
-    /* ori a3, a3, low(env->ram_size) */
-    stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));
-    /* lui ra, high(kernel_addr) */
-    stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));
-    /* ori ra, ra, low(kernel_addr) */
-    stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff));
-    /* jr ra */
-    stl_p(p++, 0x03e00008);
-    /* nop */
-    stl_p(p++, 0x00000000);
+    bl_gen_jump_kernel(&p, ENVP_VADDR - 64, 2, ENVP_VADDR,
+                       ENVP_VADDR + 8, loaderparams.ram_size,
+                       kernel_addr);
 }
 
 static void main_cpu_reset(void *opaque)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 9afc0b427b..ffd67b8293 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -37,6 +37,7 @@ 
 #include "hw/i2c/smbus_eeprom.h"
 #include "hw/block/flash.h"
 #include "hw/mips/mips.h"
+#include "hw/mips/bootloader.h"
 #include "hw/mips/cpudevs.h"
 #include "hw/pci/pci.h"
 #include "sysemu/sysemu.h"
@@ -844,6 +845,7 @@  static void write_bootloader_nanomips(uint8_t *base, uint64_t run_addr,
 static void write_bootloader(uint8_t *base, uint64_t run_addr,
                              uint64_t kernel_entry)
 {
+    target_ulong a0;
     uint32_t *p;
 
     /* Small bootloader */
@@ -872,30 +874,6 @@  static void write_bootloader(uint8_t *base, uint64_t run_addr,
     /* Second part of the bootloader */
     p = (uint32_t *) (base + 0x580);
 
-    if (semihosting_get_argc()) {
-        /* Preserve a0 content as arguments have been passed */
-        stl_p(p++, 0x00000000);              /* nop */
-    } else {
-        stl_p(p++, 0x24040002);              /* addiu a0, zero, 2 */
-    }
-
-    /* lui sp, high(ENVP_VADDR) */
-    stl_p(p++, 0x3c1d0000 | (((ENVP_VADDR - 64) >> 16) & 0xffff));
-    /* ori sp, sp, low(ENVP_VADDR) */
-    stl_p(p++, 0x37bd0000 | ((ENVP_VADDR - 64) & 0xffff));
-    /* lui a1, high(ENVP_VADDR) */
-    stl_p(p++, 0x3c050000 | ((ENVP_VADDR >> 16) & 0xffff));
-    /* ori a1, a1, low(ENVP_VADDR) */
-    stl_p(p++, 0x34a50000 | (ENVP_VADDR & 0xffff));
-    /* lui a2, high(ENVP_VADDR + 8) */
-    stl_p(p++, 0x3c060000 | (((ENVP_VADDR + 8) >> 16) & 0xffff));
-    /* ori a2, a2, low(ENVP_VADDR + 8) */
-    stl_p(p++, 0x34c60000 | ((ENVP_VADDR + 8) & 0xffff));
-    /* lui a3, high(ram_low_size) */
-    stl_p(p++, 0x3c070000 | (loaderparams.ram_low_size >> 16));
-    /* ori a3, a3, low(ram_low_size) */
-    stl_p(p++, 0x34e70000 | (loaderparams.ram_low_size & 0xffff));
-
     /* Load BAR registers as done by YAMON */
     stl_p(p++, 0x3c09b400);                  /* lui t1, 0xb400 */
 
@@ -947,13 +925,14 @@  static void write_bootloader(uint8_t *base, uint64_t run_addr,
 #endif
     stl_p(p++, 0xad280088);                  /* sw t0, 0x0088(t1) */
 
-    /* Jump to kernel code */
-    stl_p(p++, 0x3c1f0000 |
-          ((kernel_entry >> 16) & 0xffff));  /* lui ra, high(kernel_entry) */
-    stl_p(p++, 0x37ff0000 |
-          (kernel_entry & 0xffff));          /* ori ra, ra, low(kernel_entry) */
-    stl_p(p++, 0x03e00009);                  /* jalr ra */
-    stl_p(p++, 0x00000000);                  /* nop */
+    if (semihosting_get_argc()) {
+        a0 = 0;
+    } else {
+        a0 = 2;
+    }
+    bl_gen_jump_kernel(&p, ENVP_VADDR - 64, a0, ENVP_VADDR,
+                       ENVP_VADDR + 8, loaderparams.ram_low_size,
+                       kernel_entry);
 
     /* YAMON subroutines */
     p = (uint32_t *) (base + 0x800);