@@ -228,4 +228,23 @@ void destroy_ppc_opcodes(PowerPCCPU *cpu);
void ppc_gdb_init(CPUState *cs, PowerPCCPUClass *ppc);
gchar *ppc_gdb_arch_name(CPUState *cs);
+/**
+ * prot_for_access_type:
+ * @access_type: Access type
+ *
+ * Return the protection bit required for the given access type.
+ */
+static inline int prot_for_access_type(MMUAccessType access_type)
+{
+ switch (access_type) {
+ case MMU_INST_FETCH:
+ return PAGE_EXEC;
+ case MMU_DATA_LOAD:
+ return PAGE_READ;
+ case MMU_DATA_STORE:
+ return PAGE_WRITE;
+ }
+ g_assert_not_reached();
+}
+
#endif /* PPC_INTERNAL_H */
@@ -24,6 +24,7 @@
#include "exec/helper-proto.h"
#include "sysemu/kvm.h"
#include "kvm_ppc.h"
+#include "internal.h"
#include "mmu-hash32.h"
#include "exec/log.h"
@@ -421,10 +422,11 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
hwaddr pte_offset;
ppc_hash_pte32_t pte;
int prot;
- const int need_prot[] = {PAGE_READ, PAGE_WRITE, PAGE_EXEC};
+ int need_prot;
hwaddr raddr;
assert((rwx == 0) || (rwx == 1) || (rwx == 2));
+ need_prot = prot_for_access_type(rwx);
/* 1. Handle real mode accesses */
if (((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0))) {
@@ -440,7 +442,7 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
if (env->nb_BATs != 0) {
raddr = ppc_hash32_bat_lookup(cpu, eaddr, rwx, &prot);
if (raddr != -1) {
- if (need_prot[rwx] & ~prot) {
+ if (need_prot & ~prot) {
if (rwx == 2) {
cs->exception_index = POWERPC_EXCP_ISI;
env->error_code = 0x08000000;
@@ -513,7 +515,7 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
prot = ppc_hash32_pte_prot(cpu, sr, pte);
- if (need_prot[rwx] & ~prot) {
+ if (need_prot & ~prot) {
/* Access right violation */
qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n");
if (rwx == 2) {
@@ -29,6 +29,7 @@
#include "mmu-hash64.h"
#include "exec/log.h"
#include "hw/hw.h"
+#include "internal.h"
#include "mmu-book3s-v3.h"
#include "helper_regs.h"
@@ -876,7 +877,7 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr,
hwaddr ptex;
ppc_hash_pte64_t pte;
int exec_prot, pp_prot, amr_prot, prot;
- const int need_prot[] = {PAGE_READ, PAGE_WRITE, PAGE_EXEC};
+ int need_prot;
hwaddr raddr;
assert((rwx == 0) || (rwx == 1) || (rwx == 2));
@@ -996,7 +997,8 @@ skip_slb_search:
amr_prot = ppc_hash64_amr_prot(cpu, pte);
prot = exec_prot & pp_prot & amr_prot;
- if ((need_prot[rwx] & ~prot) != 0) {
+ need_prot = prot_for_access_type(rwx);
+ if (need_prot & ~prot) {
/* Access right violation */
qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n");
if (rwx == 2) {
@@ -1012,13 +1014,13 @@ skip_slb_search:
ppc_hash64_set_isi(cs, srr1);
} else {
int dsisr = 0;
- if (need_prot[rwx] & ~pp_prot) {
+ if (need_prot & ~pp_prot) {
dsisr |= DSISR_PROTFAULT;
}
if (rwx == 1) {
dsisr |= DSISR_ISSTORE;
}
- if (need_prot[rwx] & ~amr_prot) {
+ if (need_prot & ~amr_prot) {
dsisr |= DSISR_AMR;
}
ppc_hash64_set_dsi(cs, eaddr, dsisr);
@@ -25,6 +25,7 @@
#include "sysemu/kvm.h"
#include "kvm_ppc.h"
#include "exec/log.h"
+#include "internal.h"
#include "mmu-radix64.h"
#include "mmu-book3s-v3.h"
@@ -135,7 +136,7 @@ static bool ppc_radix64_check_prot(PowerPCCPU *cpu, int rwx, uint64_t pte,
bool partition_scoped)
{
CPUPPCState *env = &cpu->env;
- const int need_prot[] = { PAGE_READ, PAGE_WRITE, PAGE_EXEC };
+ int need_prot;
/* Check Page Attributes (pte58:59) */
if (((pte & R_PTE_ATT) == R_PTE_ATT_NI_IO) && (rwx == 2)) {
@@ -158,7 +159,8 @@ static bool ppc_radix64_check_prot(PowerPCCPU *cpu, int rwx, uint64_t pte,
}
/* Check if requested access type is allowed */
- if (need_prot[rwx] & ~(*prot)) { /* Page Protected for that Access */
+ need_prot = prot_for_access_type(rwx);
+ if (need_prot & ~*prot) { /* Page Protected for that Access */
*fault_cause |= DSISR_PROTFAULT;
return true;
}