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Mon, 23 Aug 2021 11:11:38 -0700 (PDT) Received: from localhost.localdomain ([2a01:4f9:3a:1e26::2]) by smtp.gmail.com with ESMTPSA id w26sm1511739lfk.223.2021.08.23.11.11.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 11:11:38 -0700 (PDT) From: Philipp Tomsich To: qemu-devel@nongnu.org Subject: [PATCH v4 03/14] target/riscv: slli.uw is only a valid encoding if shamt first in 64 bits Date: Mon, 23 Aug 2021 20:11:21 +0200 Message-Id: <20210823181132.2205367-4-philipp.tomsich@vrull.eu> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210823181132.2205367-1-philipp.tomsich@vrull.eu> References: <20210823181132.2205367-1-philipp.tomsich@vrull.eu> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::234; envelope-from=philipp.tomsich@vrull.eu; helo=mail-lj1-x234.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Kito Cheng , Richard Henderson , Philipp Tomsich Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" For RV64, the shamt field in slli.uw is 6 bits wide. While the encoding space currently reserves a wider shamt-field (for use is a future RV128 ISA), setting the additional bit to 1 will not map to slli.uw for RV64 and needs to be treated as an illegal instruction. Note that this encoding being reserved for a future RV128 does not imply that no other instructions for RV64-only could be added in this encoding space in the future. As the implementation is separate from the gen_shifti helpers, we keep it that way and add the check for the shamt-width here. Signed-off-by: Philipp Tomsich Reviewed-by: Richard Henderson --- (no changes since v3) Changes in v3: - Instead of defining a new decoding format, we treat slli.uw as if it had a 7bit-wide field for shamt (the 7th bit is reserved for RV128) and check for validity of the encoding in C code. target/riscv/insn_trans/trans_rvb.c.inc | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_trans/trans_rvb.c.inc index 3cdd70a2b9..dcc7b6893d 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -430,6 +430,15 @@ static bool trans_slli_uw(DisasContext *ctx, arg_slli_uw *a) REQUIRE_64BIT(ctx); REQUIRE_ZBA(ctx); + /* + * The shamt field is only 6 bits for RV64 (with the 7th bit + * remaining reserved for RV128). If the reserved bit is set + * on RV64, the encoding is illegal. + */ + if (a->shamt >= TARGET_LONG_BITS) { + return false; + } + TCGv source1 = tcg_temp_new(); gen_get_gpr(source1, a->rs1);