| Message ID | 20211116170133.724751-4-fbarrat@linux.ibm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Fix irq allocation of PCI host bridge on powernv | expand |
On 11/16/21 18:01, Frederic Barrat wrote: > Skip triggering an LSI when the AER root error status is updated if no > LSI is defined for the device. We can have a root bridge with no LSI, > MSI and MSI-X defined, for example on POWER systems. > > Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> > --- Reviewed-by: Cédric Le Goater <clg@kaod.org> Thanks, C. > hw/pci/pcie_aer.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c > index 27f9cc56af..e1a8a88c8c 100644 > --- a/hw/pci/pcie_aer.c > +++ b/hw/pci/pcie_aer.c > @@ -774,7 +774,9 @@ void pcie_aer_root_write_config(PCIDevice *dev, > uint32_t root_cmd = pci_get_long(aer_cap + PCI_ERR_ROOT_COMMAND); > /* 6.2.4.1.2 Interrupt Generation */ > if (!msix_enabled(dev) && !msi_enabled(dev)) { > - pci_set_irq(dev, !!(root_cmd & enabled_cmd)); > + if (pci_intx(dev) != -1) { > + pci_set_irq(dev, !!(root_cmd & enabled_cmd)); > + } > return; > } > >
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c index 27f9cc56af..e1a8a88c8c 100644 --- a/hw/pci/pcie_aer.c +++ b/hw/pci/pcie_aer.c @@ -774,7 +774,9 @@ void pcie_aer_root_write_config(PCIDevice *dev, uint32_t root_cmd = pci_get_long(aer_cap + PCI_ERR_ROOT_COMMAND); /* 6.2.4.1.2 Interrupt Generation */ if (!msix_enabled(dev) && !msi_enabled(dev)) { - pci_set_irq(dev, !!(root_cmd & enabled_cmd)); + if (pci_intx(dev) != -1) { + pci_set_irq(dev, !!(root_cmd & enabled_cmd)); + } return; }
Skip triggering an LSI when the AER root error status is updated if no LSI is defined for the device. We can have a root bridge with no LSI, MSI and MSI-X defined, for example on POWER systems. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> --- hw/pci/pcie_aer.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)