From patchwork Mon Feb 7 07:02:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ani Sinha X-Patchwork-Id: 12736998 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2E6A6C433F5 for ; Mon, 7 Feb 2022 07:28:19 +0000 (UTC) Received: from localhost ([::1]:57892 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nGyRd-0004CB-MH for qemu-devel@archiver.kernel.org; Mon, 07 Feb 2022 02:28:17 -0500 Received: from eggs.gnu.org ([209.51.188.92]:40404) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nGy33-0005TK-4d for qemu-devel@nongnu.org; Mon, 07 Feb 2022 02:02:54 -0500 Received: from [2607:f8b0:4864:20::102e] (port=40552 helo=mail-pj1-x102e.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nGy30-0003Cp-KD for qemu-devel@nongnu.org; Mon, 07 Feb 2022 02:02:52 -0500 Received: by mail-pj1-x102e.google.com with SMTP id p22-20020a17090adf9600b001b8783b2647so6305181pjv.5 for ; Sun, 06 Feb 2022 23:02:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=anisinha-ca.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0RzhCnAAfVnqTxW6ZOAaxXYBz09qhSSPZJnSquMP0Bs=; b=QU8yFSlMG1yNFxlDdsEQD9y3w+j8nW+utEBQXKSGHZKIdBfALOivFKYmk5ttj664Xd oXTxbmgbVI75gruWj9HqSgOVUYBQpx5ml0tkzcFyOwL0Lx42FTO7eykE2KTqHkX3KxhY G2nOJfkmwca4ZeCLOWxAVbLrhjZptG7gzU29bHzVezm51cmyhmC3QfBI8bPT16E02e4h cpSH/7DEeiLkTtQi7hnysPXABLmSKgrrNyKkNSLVFNJi6TWHkBxZO07S2mlxp+/a6qfC WDT9QchOeQg9biOTK5ipIeflaobxGwfPowF/bz6hbNgmd6OrOFPbuCenb4HTGPRy/fLy i/Zg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0RzhCnAAfVnqTxW6ZOAaxXYBz09qhSSPZJnSquMP0Bs=; b=0pCmTyYqcja7F6w7lea3sxg5IuD4UVawPSxN+P/h8/7Cl4Aq1tTf64sO0ymNJff1uy ZlQRlSQka6gICsTs4VgPQRdekucozKPumlXQX7wQYmolxF9egCpSRMGePCi+JKfJHnxI loF4yDo5dPmOvzgEiEMwGnqC5bWjazVOYLTTDGUw3tZCbwvm0mfac4TQ2QDj5H5lTf/a z0PRAduU2lUYyP4ndjn/PXBKYnFdWhYeophCdmPoB73SOjPrE6WGNA9fHgUwU9gSD2EJ D9N1NbW+OY/P1esmbEYenjEOfNLhcDE0VSi9v1RkPOSsiaQVXc7y7QyYkFc2GgCDTz9C jwog== X-Gm-Message-State: AOAM533Ee9oZLsUibCkjT5jFDL8gIptbxl6w9GH6bZco/UOiN70+zfQ0 Rii8Y4+Raqa08VuTzYdiQf1RzHBXwpAct/sPSijS6A== X-Google-Smtp-Source: ABdhPJwr7FeDgBiKpdn4x7tGDsCbuv0fITn52D8ZiHpISFM5tzANoAu8R9A/vxtg32kaRu7iHZ19ag== X-Received: by 2002:a17:90b:78c:: with SMTP id l12mr16868771pjz.73.1644217365230; Sun, 06 Feb 2022 23:02:45 -0800 (PST) Received: from anisinha-lenovo.ba.nuagenetworks.net ([203.212.242.56]) by smtp.googlemail.com with ESMTPSA id c2sm7535747pgi.55.2022.02.06.23.02.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Feb 2022 23:02:44 -0800 (PST) From: Ani Sinha To: qemu-devel@nongnu.org Subject: [PATCH v16] ACPI ERST: specification for ERST support Date: Mon, 7 Feb 2022 12:32:33 +0530 Message-Id: <20220207070233.2632953-2-ani@anisinha.ca> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220207070233.2632953-1-ani@anisinha.ca> References: <20220207070233.2632953-1-ani@anisinha.ca> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102e (failed) Received-SPF: none client-ip=2607:f8b0:4864:20::102e; envelope-from=ani@anisinha.ca; helo=mail-pj1-x102e.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ani Sinha , eric.devolder@oracle.com, mst@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Eric DeVolder Information on the implementation of the ACPI ERST support. Signed-off-by: Eric DeVolder Acked-by: Ani Sinha --- docs/specs/acpi_erst.rst | 200 +++++++++++++++++++++++++++++++++++++++ docs/specs/index.rst | 1 + 2 files changed, 201 insertions(+) create mode 100644 docs/specs/acpi_erst.rst diff --git a/docs/specs/acpi_erst.rst b/docs/specs/acpi_erst.rst new file mode 100644 index 0000000000..a8a9d22d25 --- /dev/null +++ b/docs/specs/acpi_erst.rst @@ -0,0 +1,200 @@ +ACPI ERST DEVICE +================ + +The ACPI ERST device is utilized to support the ACPI Error Record +Serialization Table, ERST, functionality. This feature is designed for +storing error records in persistent storage for future reference +and/or debugging. + +The ACPI specification[1], in Chapter "ACPI Platform Error Interfaces +(APEI)", and specifically subsection "Error Serialization", outlines a +method for storing error records into persistent storage. + +The format of error records is described in the UEFI specification[2], +in Appendix N "Common Platform Error Record". + +While the ACPI specification allows for an NVRAM "mode" (see +GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES) where non-volatile RAM is +directly exposed for direct access by the OS/guest, this device +implements the non-NVRAM "mode". This non-NVRAM "mode" is what is +implemented by most BIOS (since flash memory requires programming +operations in order to update its contents). Furthermore, as of the +time of this writing, Linux only supports the non-NVRAM "mode". + + +Background/Motivation +--------------------- + +Linux uses the persistent storage filesystem, pstore, to record +information (eg. dmesg tail) upon panics and shutdowns. Pstore is +independent of, and runs before, kdump. In certain scenarios (ie. +hosts/guests with root filesystems on NFS/iSCSI where networking +software and/or hardware fails, and thus kdump fails), pstore may +contain information available for post-mortem debugging. + +Two common storage backends for the pstore filesystem are ACPI ERST +and UEFI. Most BIOS implement ACPI ERST. UEFI is not utilized in all +guests. With QEMU supporting ACPI ERST, it becomes a viable pstore +storage backend for virtual machines (as it is now for bare metal +machines). + +Enabling support for ACPI ERST facilitates a consistent method to +capture kernel panic information in a wide range of guests: from +resource-constrained microvms to very large guests, and in particular, +in direct-boot environments (which would lack UEFI run-time services). + +Note that Microsoft Windows also utilizes the ACPI ERST for certain +crash information, if available[3]. + + +Configuration|Usage +------------------- + +To use ACPI ERST, a memory-backend-file object and acpi-erst device +can be created, for example: + + qemu ... + -object memory-backend-file,id=erstnvram,mem-path=acpi-erst.backing,size=0x10000,share=on \ + -device acpi-erst,memdev=erstnvram + +For proper operation, the ACPI ERST device needs a memory-backend-file +object with the following parameters: + + - id: The id of the memory-backend-file object is used to associate + this memory with the acpi-erst device. + - size: The size of the ACPI ERST backing storage. This parameter is + required. + - mem-path: The location of the ACPI ERST backing storage file. This + parameter is also required. + - share: The share=on parameter is required so that updates to the + ERST backing store are written to the file. + +and ERST device: + + - memdev: Is the object id of the memory-backend-file. + - record_size: Specifies the size of the records (or slots) in the + backend storage. Must be a power of two value greater than or + equal to 4096 (PAGE_SIZE). + + +PCI Interface +------------- + +The ERST device is a PCI device with two BARs, one for accessing the +programming registers, and the other for accessing the record exchange +buffer. + +BAR0 contains the programming interface consisting of ACTION and VALUE +64-bit registers. All ERST actions/operations/side effects happen on +the write to the ACTION, by design. Any data needed by the action must +be placed into VALUE prior to writing ACTION. Reading the VALUE +simply returns the register contents, which can be updated by a +previous ACTION. + +BAR1 contains the 8KiB record exchange buffer, which is the +implemented maximum record size. + + +Backend Storage Format +---------------------- + +The backend storage is divided into fixed size "slots", 8KiB in +length, with each slot storing a single record. Not all slots need to +be occupied, and they need not be occupied in a contiguous fashion. +The ability to clear/erase specific records allows for the formation +of unoccupied slots. + +Slot 0 contains a backend storage header that identifies the contents +as ERST and also facilitates efficient access to the records. +Depending upon the size of the backend storage, additional slots will +be designated to be a part of the slot 0 header. For example, at 8KiB, +the slot 0 header can accomodate 1021 records. Thus a storage size +of 8MiB (8KiB * 1024) requires an additional slot for use by the +header. In this scenario, slot 0 and slot 1 form the backend storage +header, and records can be stored starting at slot 2. + +Below is an example layout of the backend storage format (for storage +size less than 8MiB). The size of the storage is a multiple of 8KiB, +and contains N number of slots to store records. The example below +shows two records (in CPER format) in the backend storage, while the +remaining slots are empty/available. + +:: + + Slot Record + <------------------ 8KiB --------------------> + +--------------------------------------------+ + 0 | storage header | + +--------------------------------------------+ + 1 | empty/available | + +--------------------------------------------+ + 2 | CPER | + +--------------------------------------------+ + 3 | CPER | + +--------------------------------------------+ + ... | | + +--------------------------------------------+ + N | empty/available | + +--------------------------------------------+ + +The storage header consists of some basic information and an array +of CPER record_id's to efficiently access records in the backend +storage. + +All fields in the header are stored in little endian format. + +:: + + +--------------------------------------------+ + | magic | 0x0000 + +--------------------------------------------+ + | record_offset | record_size | 0x0008 + +--------------------------------------------+ + | record_count | reserved | version | 0x0010 + +--------------------------------------------+ + | record_id[0] | 0x0018 + +--------------------------------------------+ + | record_id[1] | 0x0020 + +--------------------------------------------+ + | record_id[...] | + +--------------------------------------------+ + | record_id[N] | 0x1FF8 + +--------------------------------------------+ + +The 'magic' field contains the value 0x524F545354535245. + +The 'record_size' field contains the value 0x2000, 8KiB. + +The 'record_offset' field points to the first record_id in the array, +0x0018. + +The 'version' field contains 0x0100, the first version. + +The 'record_count' field contains the number of valid records in the +backend storage. + +The 'record_id' array fields are the 64-bit record identifiers of the +CPER record in the corresponding slot. Stated differently, the +location of a CPER record_id in the record_id[] array provides the +slot index for the corresponding record in the backend storage. + +Note that, for example, with a backend storage less than 8MiB, slot 0 +contains the header, so the record_id[0] will never contain a valid +CPER record_id. Instead slot 1 is the first available slot and thus +record_id_[1] may contain a CPER. + +A 'record_id' of all 0s or all 1s indicates an invalid record (ie. the +slot is available). + + +References +---------- + +[1] "Advanced Configuration and Power Interface Specification", + version 4.0, June 2009. + +[2] "Unified Extensible Firmware Interface Specification", + version 2.1, October 2008. + +[3] "Windows Hardware Error Architecture", specfically + "Error Record Persistence Mechanism". diff --git a/docs/specs/index.rst b/docs/specs/index.rst index ecc43896bb..32863b4aa5 100644 --- a/docs/specs/index.rst +++ b/docs/specs/index.rst @@ -18,3 +18,4 @@ guest hardware that is specific to QEMU. acpi_mem_hotplug acpi_pci_hotplug acpi_nvdimm + acpi_erst