| Message ID | 20220307134353.1950-7-philippe.mathieu.daude@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | hw: ISA & MIPS patches from Bernhard Beschow | expand |
On 3/7/22 03:43, Philippe Mathieu-Daudé wrote: > From: Bernhard Beschow<shentey@gmail.com> > > This is a follow-up on patch "malta: Move PCI interrupt handling from > gt64xxx_pci to piix4". gt64xxx_pci used magic constants, and probably > didn't want to use piix4-specific constants. Now that the interrupt > handing resides in piix4, its constants can be used. > > Signed-off-by: Bernhard Beschow<shentey@gmail.com> > Reviewed-by: Philippe Mathieu-Daudé<f4bug@amsat.org> > Acked-by: Michael S. Tsirkin<mst@redhat.com> > Message-Id:<20220217101924.15347-7-shentey@gmail.com> > Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org> > --- > hw/isa/piix4.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 2e9b5ccada..f876c71750 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -61,10 +61,10 @@ static void piix4_set_irq(void *opaque, int irq_num, int level) /* now we change the pic irq level according to the piix irq mappings */ /* XXX: optimize */ pic_irq = s->dev.config[PIIX_PIRQCA + irq_num]; - if (pic_irq < 16) { + if (pic_irq < ISA_NUM_IRQS) { /* The pic level is the logical OR of all the PCI irqs mapped to it. */ pic_level = 0; - for (i = 0; i < 4; i++) { + for (i = 0; i < PIIX_NUM_PIRQS; i++) { if (pic_irq == s->dev.config[PIIX_PIRQCA + i]) { pic_level |= pci_bus_get_irq_level(bus, i); } @@ -315,7 +315,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus) NULL, 0, NULL); } - pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, 4); + pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, PIIX_NUM_PIRQS); return dev; }